Abstract: A zero-crossing circuit and method, in which the sign of inputs to a comparator is reversed after each zero crossing of the input signal. This means that delay introduced by the comparator does not affect the duty cycle of the output signal, so precision synchronization remains possible.
Type:
Grant
Filed:
September 13, 1994
Date of Patent:
April 22, 1997
Assignee:
SGS-Thomson Microelectonics, S.r.l.
Inventors:
Giorgio Betti, Paolo Gadducci, David Moloney