Abstract: A pulse-controlled circuit for an insulate gate power transistor (Tp) comprises an auxiliary MOS transistor (T1) connected between the gate and a reference terminal of the power transformer in parallel with a pulse transformer secondary (W2). This circuit comprises two controlled unidirectionally conductive paths in parallel (D1, M1; D2, M2) between one terminal of the transformer secondary and the auxiliary transistor gate, these paths being alternatively rendered conductive when a positive or negative pulse is applied to the secondary of the transformer.