Abstract: A lead frame includes leads including inner leads and outer leads. Each of the leads includes an inner lead and an outer lead. A tie bar extends so as to cross connecting points of the inner leads and the outer leads. The leads and the tie bar include a first surface, a second surface, and side surfaces. A plating layer is provided on the inner leads, the outer leads and the tie bar. A first non-plating region is provided between an edge in the first surface of the inner lead and an edge of the plating layer provided on the first surface of the inner lead. A second non-plating region is provided between an edge of the first surface on the inner lead side of the tie bar and an edge on the inner lead side of the plating layer provided on the first surface of the tie bar.

Abstract: Methods for producing a substrate for semiconductor element mounts are provided. A base substrate can be prepared having on a first metal layer, a second metal layer through which a metal layer for instrumentation is hardly diffusible. A patterned resist mask layer on the second metal layer can be formed. A surface of the second metal layer under reprocessing treatment can form a reprocessed surface which can be provided with an organic film that controls adhesion between the metal layer for instrumentation and the reprocessed surface by a liquid agent containing a component that shows the nature of amphoteric surfactant. The metal layer for instrumentation can be formed on the reprocessed surface via the organic film. A semiconductor element mount portion and an electrode terminal portion can be electroformed on the metal layer for instrumentation. The resist mask from the second metal layer of the base substrate may be removed.

Abstract: A metal plate 1 to be a lead frame has a plating with Sn or Zn or a plating with various alloys containing these metals only on the side faces and half-etched faces 6, and a noble metal plating layer formed on the front surface as a surface on which a semiconductor device is to be mounted.

Abstract: A semiconductor lead frame includes a metal plate and a semiconductor chip mounting area provided on a top surface of the metal plate. A first plating layer for an internal terminal is provided around the semiconductor chip mounting area. A second plating layer for an external terminal is provided on a back surface of the metal plate at a location opposite to the semiconductor chip mounting area. The first plating layer includes a fall-off prevention structure for preventing the first plating layer from falling off from an encapsulating resin when the top surface of the metal plate is encapsulated in the encapsulating resin. The second plating layer does not include the fall-off prevention structure.

Abstract: A lead frame for mounting semiconductor element includes a protrusion that is horizontally projects from edges of the upper and lower surfaces of a semiconductor-mounting part or a terminal part of the lead frame and that is provided on a lateral side of at least one of the semiconductor-mounting part or the terminal part of the lead frame, wherein the top end of the protrusion is substantially flat or the profile of the cross section of the top end is arc-shaped, and the top end of the protrusion is thick.

Abstract: A lead frame, as one product unit in a multi-row lead frame sharing a partition frame among other lead frames, has a non-mirrorsymmetric pad region and at least one terminal region arranged inside and held to a rectangular outer frame region, which is a part of the partition frame and forms a boundary of the lead frame as a product unit, via respective suspension leads. Only two suspension leads hold the non-mirrorsymmetric pad region to the outer frame region as extending from opposite sides of the outer frame region to the non-mirrorsymmetric pad region, respectively. This structure decreases stress resulting from holding of the non-mirrorsymmetric pad region to the outer frame region and thus can prevent the outer frame region from deformation without widened connecting bars or dambars, which form the outer frame region.

Abstract: A process of forming, on a surface of the substrate a plurality of resist layers made of two kinds of dry film resist that differ in main peak wavelength in spectral photosensitivity. An exposure process of selectively exposing and affecting a particular resist layer in accordance with a first pattern upon using a first exposure mask overlaid on the plurality of resist layers. A second exposure process of exposing another resist layer in accordance with a second pattern upon using a second exposure mask overlaid on the plurality of resist layers. Partially uncovering the surface of the substrate by removing unexposed portions of the plurality of resist layers, to form a resist mask having an aperture. Finally, forming a coat layer by plating a portion of the substrate where the surface thereof is uncovered; and a process of removing the resist mask.

Abstract: A lead frame for mounting semiconductor element includes a protrusion that is horizontally projects from edges of the upper and lower surfaces of a semiconductor-mounting part or a terminal part of the lead frame and that is provided on a lateral side of at least one of the semiconductor-mounting part or the terminal part of the lead frame, wherein the top end of the protrusion is substantially flat or the profile of the cross section of the top end is arc-shaped, and the top end of the protrusion is thick.

Abstract: [Object] To provide a substrate for semiconductor element mount that makes it possible to stably produce, in a highly mass-productive manner, surface-mount type semiconductor devices.

Abstract: A manufacturing method of a substrate for a semiconductor package includes a resist layer forming step to form a resist layer on a surface of a conductive substrate; an exposure step to expose the resist layer using a glass mask with a mask pattern including a transmission area, a light shielding area, and an intermediate transmission area, wherein transmittance of the intermediate transmission area is lower than that of the transmission area and is higher than that of the light shielding area; a development step to form a resist pattern including a hollow with a side shape including a slope part decreasing in hollow circumference as the hollow circumference approaches the substrate; and a plating step to plate on an exposed area to form a metal layer with a side shape including a slope part decreasing in circumference as the circumference approaches the substrate.