Patents Assigned to Shaibaura Denki Kabushiki Kaisha
  • Memory device resistant to soft errors
    Patent number: 4592026
    Abstract: In a memory device, a plurality of memory cells are connected to bit line pairs. A precharge circuit is controlled by a chip enable signal during a stand-by state and by an address transition detector signal during an active state, to charge the bit line pairs up to a given power source voltage.
    Type: Grant
    Filed: December 23, 1983
    Date of Patent: May 27, 1986
    Assignee: Shaibaura Denki Kabushiki Kaisha
    Inventors: Naohiro Matsukawa, Mitsuo Isobe, Takayasu Sakurai