Patents Assigned to SHANGHAI ANALOGY SEMICONDUCTOR TECHNOLOGY LTD.
  • Patent number: 11838031
    Abstract: A digital-to-analog conversion circuit, comprising: an R?2R resistive network (10) configured to be connected between an output end and a ground end; an output voltage selection unit (20) configured to be connected between the output end of the R?2R resistive network (10) and a voltage output terminal; an output voltage trimming unit (30), wherein the output voltage trimming unit (30) is provided between a 2R resistor on at least one branch of the R?2R resistive network (10) and the ground end.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: December 5, 2023
    Assignee: SHANGHAI ANALOGY SEMICONDUCTOR TECHNOLOGY LTD.
    Inventors: Jun Zhang, Zhian Zhang
  • Patent number: 11757417
    Abstract: The present invention provides a common-mode rejection ratio and gain trimming circuit of differential amplifier, comprising: a first trimming unit and a second trimming unit coupled between an in-phase input voltage and a reference voltage, wherein the first trimming unit and the second trimming unit are coupled to a positive input terminal of the differential amplifier by means of tap switches; a third trimming unit and a fourth trimming unit coupled between tan inverting input voltage and an output terminal of the differential amplifier, wherein the third trimming unit and the fourth trimming unit are coupled to a negative input terminal of the differential amplifier by means of tap switches; wherein, the first trimming unit, the second trimming unit, the third trimming unit, and the fourth trimming unit comprise: a first trimming resistor string and a second trimming resistor string coupled in series; the first trimming resistor string is coupled in parallel with a first trimming auxiliary resistor string
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: September 12, 2023
    Assignee: SHANGHAI ANALOGY SEMICONDUCTOR TECHNOLOGY Ltd.
    Inventors: Jun Zhang, Yi Du, Zhihao Yan
  • Publication number: 20220271772
    Abstract: A digital-to-analog conversion circuit, comprising: an R?2R resistive network (10) configured to be connected between an output end and a ground end; an output voltage selection unit (20) configured to be connected between the output end of the R?2R resistive network (10) and a voltage output terminal; an output voltage trimming unit (30), wherein the output voltage trimming unit (30) is provided between a 2R resistor on at least one branch of the R?2R resistive network (10) and the ground end.
    Type: Application
    Filed: April 30, 2020
    Publication date: August 25, 2022
    Applicant: SHANGHAI ANALOGY SEMICONDUCTOR TECHNOLOGY LTD.
    Inventors: Jun ZHANG, Zhian ZHANG