Abstract: The present invention discloses a pixel structure of a stacked image sensor and a preparation method thereof, by bonding processes to stack a first silicon wafer to a third silicon wafer up and down; wherein, a first photodiode array is set on the first silicon wafer located in middle, and a second photodiode array is provided on the second silicon wafer located above, and the surface of each the second photodiode in the second photodiode array is aligned and bonded correspondingly with the surface of each the first photodiode in the first photodiode array, so as to form a chip of the pixel structure of the stacked image sensor with a very deep junction depth, which is particularly suitable for near-infrared sensitization, and can effectively improve quantum efficiency in near-infrared wave bands; and by adopting a backlight technology, incident lights irradiating to photodiodes are not affected by the metal interconnect layers, both of sensitive and fill factor are high, especially for small-size pixels, whi

Abstract: The present invention discloses a bonding cavity structure and a bonding method, the bonding cavity structure comprises an upper carrier and a lower carrier, a gas-flow forming mechanism, which comprises multiple open-close integrated arms, the integrated arms are provided with multiple nozzles facing to wafer bonding surfaces, and the nozzles are switched to gas nozzles or vacuum suction nozzles, a closed space is formed by all the integrated arms closed together with the carriers, all the nozzle located on a side of two wafers are set as the gas nozzles, which blow gas parallel to the wafer bonding surfaces, meanwhile, all the nozzles located on the other side of the two wafers are set as the vacuum suction nozzles, which suck the gas blown from the gas nozzle at corresponding position, a high-speed gas-flow is generated between the two wafers, so as to produce a low pressure of Bernoulli effect, the wafers are not only subjected to thrust forces from backsides, but tension forces between the bonding surfac

Abstract: The disclosure discloses a CMOS image sensor, which includes a plurality of image sensor units and a resistance-to-digital converting unit. Each image sensor unit includes a pixel unit and a resistive random access memory unit connected to the pixel unit, the pixel unit is configured to convert a received optical signal into an analog signal and the resistive random access memory unit is configured to convert the analog electrical signal into a resistance value. The resistance-to-digital converting unit is connected to the plurality of the image sensor units, and is configured to convert the resistance value into a digital signal. The resistive random access memory unit is adopted in the present disclosure to replace a transistor device and is configured to convert resistance information of the resistive random access memory unit into a digital signal and output. Thus, digital quantization of image information is completed.

Abstract: The present disclosure relates to an image sensor structure and a manufacturing method thereof. A detection structure layer and a blind pixel structure layer are used. The detection structure layer and the blind pixel structure layer are effectively combined and further formed by ion implantation. Thus, the space ratio of a single pixel is reduced, the integration and device sensitivity are improved, and the blind pixel array and the pixel array are also in the same environment, thereby further improving the detection sensitivity and reducing the detection error.

Abstract: A transition metal dichalcogenide transistor, comprising: a gate, a gate dielectric layer and a channel layer from bottom to top, a source/drain region are located on both the sides of the gate dielectric layer, wherein, in a plane paralleled to the channel layer, the length of the channel layer in each direction is greater than the length of the gate dielectric layer, and the length of the gate dielectric layer in each direction is greater than or equal to the length of the gate; wherein, the source/drain region are a first transition metal dichalcogenide with metallic properties, and the channel layer is a second transition metal dichalcogenide with semiconductor properties.

Abstract: The present disclosure relates to an apparatus and a method for improving film thickness uniformity, wherein a PECVD machine with twin chambers comprise a wafer heating platform, which is set to be a rotating platform with programmable speed control, by setting rotating speed of the platform, wafer is rotated for integral rounds within process time, so that a RF overlap between the twin chambers make consistent influence on edge regions of the wafer, and film around the wafer is evenly distributed, which not only eliminate abrupt change of film thickness caused by the RF overlap, but also reduce film thickness differences between edge regions and central regions of the film by a characteristic that the RF overlap improves film deposition rate, so as to ensure the film thickness more evenly in the range of the whole wafer.

Abstract: A method of removing fixed pattern noise, comprising: S01: performing a single-frame segmented exposure on a pixel array; S02: reading a of the pixel array, comprising: S021: performing a soft reset, so as to set the reset signal of the pixel unit to an intermediate voltage, and reading a differential reset signal; S022: performing a hard reset so as to set the reset signal of the pixel unit to a high voltage; S023: turning on a transmission MOS transistor to enable an exposure signal of to photodiode to transmitted to the floating diffusion area, and reading a differential pixel transmission signal; S03: subtracting the differential reset signal from the differential pixel transmission signal to obtain an exposure signal with fixed pattern noise removed. Another method is removing fixed pattern noise and an image sensor are further provided.

Abstract: The present invention discloses an image sensor for real-time calibration of dark current, including a pixel array comprises at least a pixel unit, the pixel unit includes a pixel photosensitive portion, a pixel dark shielding portion and a subtraction circuit, photodiodes in the pixel photosensitive portion and the pixel dark shielding portion are isolated by deep trench isolations, the pixel dark shielding portion are covered by a dark shielding layer; both of the pixel photosensitive portion and the pixel dark shielding portion adopt a same voltage and sequential control, a light ambient voltage signal and a non-light ambient voltage signal are generated and connected to both ends of a subtraction circuit to realize subtraction and dark current calibration.

Abstract: The present disclosure provides an image sensor and a method for manufacturing deep trench and through-silicon via of the image sensor, wherein: providing a pixel silicon wafer, performing a silicon wafer thinning on a second side of the pixel silicon wafer; forming a deep trench on the the second side of the pixel silicon wafer; filling the deep trench with organic material; coating photoresist on the second side of the pixel silicon wafer; etching the second side of the pixel silicon wafer to form a through-silicon via according to the through-silicon via pattern; depositing a dielectric protective layer on the surface of the deep trench and the surface of the through-silicon via; filling the deep trench with organic material; coating the photoresist on the second side of the pixel silicon wafer; etching the second side of the pixel silicon wafer to form a contact hole according to the contact hole pattern, depositing a barrier layer on the surface of the deep trench and the surface of the through-silicon v

Abstract: The present disclosure discloses an infrared sensor structure, comprises a cantilever switch array, the cantilever switch array comprises cantilever switches, and each cantilever switch comprises a cantilever beam and a switch corresponding to the cantilever beam, vertical heights from the cantilever beams to the switches in different cantilever switches are different from each other, when the cantilever beams are deformed towards the switches and connect to the switches, the switches turn on; wherein, deformations of different cantilever beams produced by absorbing infrared signal are different from each other, the intensity of the infrared signal can be quantified by number of the switches on, so as to realize detection of the infrared signal. The manufacturing of the infrared sensor structure in the present disclosure can be compatible with the existing semiconductor CMOS process.

Abstract: The present disclosure refers to a multispectral image sensor and a manufacturing method thereof. The multispectral image sensor comprises a front-end structure used for photoelectric conversion and processing, and a pixel layer provided on the front-end structure. The pixel layer comprises N pixel units, and N?4, the pixel units are arranged in a plurality of arrays, a photosensitive wavelength of each pixel unit in each array is different. Whereby, multispectrals can be detected simultaneously, and therefore the efficiency is improved, costs are reduced, and miniaturization is achieved.

Abstract: The present disclosure relates to an image sensor structure and a manufacturing method thereof. A detection structure layer and a blind pixel structure layer are used. The detection structure layer and the blind pixel structure layer are effectively combined and further formed by ion implantation. Thus, the space ratio of a single pixel is reduced, the integration and device sensitivity are improved, and the blind pixel array and the pixel array are also in the same environment, thereby further improving the detection sensitivity and reducing the detection error.

Abstract: The present disclosure discloses a method for manufacturing a backside-illuminated CMOS image sensor structure, the method comprises: providing a silicon substrate which has been subjected to a frontside processing and a back thinning; forming grid-shaped deep trenchs on the back of the silicon substrate; forming an insulating layer on the inner wall surface of the deep trenchs to form a grid-shaped deep trenchs isolation structure; forming a diffusion barrier layer on the surface of the insulating layer; filling metal in the deep trenchs to form a grid-shaped composite structure in which the Metal grid is combined with the deep trenchs isolation structure.

Abstract: A MIPI D-PHY circuit comprises a main control module, a controlled module, an internal data source generating module, and a configuration register. The main control module and the controlled module are respectively connected to the configuration register, and the main control module is connected to the internal data source generating module. The main control module and the controlled module comprise a clock channel and a data channel respectively. The clock channel and the data channel in the main control module and the data channel and the clock channel in the controlled module both comprise an error detection unit. The MIPI D-PHY circuit provided by the present disclosure adopts the error detection unit to detect the signals of the main control module and the controlled module.

Abstract: The disclosure provides a voltage-controlled magnetic anisotropic magnetic random access memory. The memory comprises a virtual array, a memory array and a peripheral circuit, wherein the memory array comprises memory cells with X rows and Y columns; the virtual array comprises virtual cells with X rows and one column; the peripheral circuit comprises at least one data sampling-decision-output circuit, the data sampling-decision-output circuit comprises a sensitive amplifier circuit and a logic circuit in series, and are simultaneously connected to the data sampling-decision-output circuit in the peripheral circuit at the same time. By changing the width-length ratio of a differential circuit in the sensitive amplifier circuit and adding the virtual array, the problem that the storage state of the voltage-controlled magnetic anisotropy magnetic random access memory cannot be determined is effectively solved, and the risk of resistance deviation under different process conditions also can be avoided.

Abstract: The invention provided an ion implantation system. The ion implantation system comprises an ion emitting device and a target plate device; the target plate device comprises a graphite electrode unit and a power supply unit; the graphite electrode unit is mounted on the lower end of a support frame, and the graphite electrode unit is a hollow structure; the graphite electrode unit comprises a graphite electrode and a hollow region I, the graphite electrode is connected to the power supply unit; the area of the hollow region I is smaller than that of the wafer to be processed, and the sum of the area of the graphite electrode and the area of the hollow region I is larger than an implantation area of the ion beam.

Abstract: The invention discloses a manufacturing method for FinFET device, comprises following steps: S01: providing an SOI substrate; S02: covering a middle part of the top silicon layer by using a barrier layer, and performing a silicon ion implantation on the top silicon layer, so that the buried insulator layer under the top silicon layer not covered by the barrier layer is converted into silicon-rich silicon dioxide, wherein in the top silicon layer, the part not covered by the barrier layer is called an implanted region, and the part covered by the barrier layer is called a non-implanted region; S03: removing the barrier layer, define a fin structure in the top silicon layer, the fin structure includes a channel and a source and drain, the source and drain are located on opposite sides of the channel; and the channel in the fin structure is located in the non-implanted region of the top silicon layer, the source and drain are located in the implanted region of the top silicon layer; removing the top silicon laye

Abstract: The present invention discloses a motion detection circuit applied to CIS and a motion detection method.

Abstract: The present invention provides an infrared detector pixel structure and manufacturing method thereof.

Abstract: The present disclosure provides a global shutter CMOS pixel circuit and its image capturing method. The global shutter CMOS pixel circuit comprising a power supply unit, a pixel signal generating unit, a signal sampling and holding unit and a signal outputting unit. An output of the pixel signal generating unit is connected to an input of the signal sampling and holding unit. An output of the signal sampling and holding unit is connected to an input of the signal outputting unit. The output signal of the pixel and the photo-generated current are set to a logarithmic relationship, which effectively increases the signal dynamic range. Therefore, image signal transmission with high speed and high dynamic range can be achieved simultaneously. Furthermore, the pixels in the present disclosure can eliminate the process variations, which increases the consistency of the pixels.