Patents Assigned to SHANGHAI SIMGUI TECHNOLOGY CO., LTD.
  • Patent number: 10388529
    Abstract: A method for preparing a substrate with an insulating buried layer includes: providing a substrate, the substrate having a supporting layer and an insulating layer arranged on a surface of the supporting layer; performing first ion implantation, implanting modified ions into the substrate, wherein a distance from an interface between the insulating layer and the supporting layer to a Gaussian distribution peak of modified ion concentration is less than 50 nm, such that the modified ions form a nano cluster in the insulating layer; and performing a second ion implantation, continuing to implant the modified ions into the insulating layer, wherein the ions are implanted in the same way as the first ion implantation, and a distance from a Gaussian distribution peak of modified ion concentration in this step to the Gaussian distribution peak of modified ion concentration in the first ion implantation is less than 80 nm.
    Type: Grant
    Filed: February 26, 2018
    Date of Patent: August 20, 2019
    Assignee: SHANGHAI SIMGUI TECHNOLOGY CO., LTD.
    Inventors: Xing Wei, Yongwei Chang, Meng Chen, Guoxing Chen, Lu Fei, Xi Wang
  • Patent number: 10361114
    Abstract: The present disclosure provides a method for preparing a substrate with a carrier trapping center. The method includes: implanting bubbling ions into the semiconductor substrate to form a splitting layer, and implanting modified ions into the insulating layer to form a nano cluster; providing a supporting substrate; bonding the supporting substrate to the semiconductor substrate by using the insulating layer as an intermediate layer; performing a first heat treatment for the bonded substrate such that a splitting layer is formed at the position where the bubbling ions are implanted, and causing the semiconductor substrate to split at the position of the splitting layer; performing rapid thermal annealing for the substrate; and performing a second heat treatment for the rapidly thermally annealed semiconductor substrate to consolidate the bonding interface and form the nano cluster at the position where the modified ions are implanted.
    Type: Grant
    Filed: February 26, 2018
    Date of Patent: July 23, 2019
    Assignee: SHANGHAI SIMGUI TECHNOLOGY CO., LTD.
    Inventors: Xing Wei, Yongwei Chang, Meng Chen, Guoxing Chen, Lu Fei, Xi Wang
  • Patent number: 9299556
    Abstract: A method for preparing a semiconductor substrate with an buried insulating layer by a guttering process, includes the following steps: providing a device substrate and a supporting substrate; forming an insulating layer on a surface of the device substrate; performing a heating treatment on the device substrate, so as to form a denuded zone on the surface of the device substrate; bonding the device substrate having the insulating layer with the supporting substrate, such that the insulating layer is sandwiched between the device substrate and the supporting substrate; annealing and reinforcing a bonding interface, such that an adherence level of the bonding interface meets requirements in the following chamfering grinding, thinning and polishing processes; performing the chamfering grinding, thinning and polishing processes on the device substrate which is bonded.
    Type: Grant
    Filed: December 31, 2010
    Date of Patent: March 29, 2016
    Assignees: SHANGHAI SIMGUI TECHNOLOGY CO. LTD., SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY, CHINESE ACADEMY OF SCIENCES
    Inventors: Xing Wei, Zhongdang Wang, Fei Ye, Gongbai Cao, Chenglu Lin, Miao Zhang, Xi Wang
  • Publication number: 20120122299
    Abstract: A method for forming an edge-chamfered substrate with a buried insulating layer is provided, which comprises the following steps: providing a first substrate (S10); forming an etching mask layer on surfaces of the first substrate, wherein said etching mask layer is formed on the whole surfaces of the first substrate (S11); chamfering a glazed surface of the first substrate and the etching mask layer thereon by the edge grinding (S12); by rotary etching, etching the first substrate which is exposed by the edge grinding on the etching mask layer (S13); providing a second substrate (S14); and bonding the first substrate to the second substrate with a buried insulating layer (S15). The method avoids the edge collapses and the changes of the warp degree in subsequent processes.
    Type: Application
    Filed: July 10, 2010
    Publication date: May 17, 2012
    Applicants: SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY, CHINESE ACADEMY OF SCIENCE, SHANGHAI SIMGUI TECHNOLOGY CO., LTD.
    Inventors: Xiang Wang, Xing Wei, Miao Zhang, Chenglu Lin, Xi Wang