Patents Assigned to Shanghai WuQi Microelectronics Co., Ltd.
-
Publication number: 20240380648Abstract: This application discloses a high-precision multi-phase CFR system and method and use. This application relates to the technical field of PAPR reduction. The CFR system is a single-stage multi-phase structure, which is used for an input signal to perform peak searching and phase recording at a high rate, and to perform peak screening, peak allocation and peak cancellation at a single rate; in the cancellation signal generation, the peak noise after the peak screening is pulse shaped and compensated for the recorded phases at the high rate by multi-phase CPG coefficients; and according to the peak allocation, multiple CPG pulse signals are combined to obtain a final cancellation signal; then a delayed original signal and the final cancellation signal are subtracted to obtain a low-PAPR signal for output.Type: ApplicationFiled: July 25, 2024Publication date: November 14, 2024Applicants: Chongqing WuQi Microelectronics Co., Ltd., Shanghai WUQI Microelectronics Co., Ltd.Inventors: Qiang GU, Jinbang ZONG
-
Publication number: 20240364574Abstract: This application discloses an IQ imbalance compensation method for WiFi broadband transmitting and receiving paths and application thereof. This application relates to the field of digital signal processing. The method comprises: inputting IQ signals into a frequency-related IQ imbalance compensation device FD-IQMC; the FD-IQMC device first performing frequency-independent overall compensation on IQ imbalance by means of a frequency-independent IQ imbalance compensation module FI-iqmc, and then selecting one signal from the IQ signals and inputting same into a Frac-delay filter and an Amp-FIR filter so as to respectively perform phase and amplitude compensation of frequency-selectivity; and inputting another signal into a delay module to be time-aligned with the selected signal.Type: ApplicationFiled: July 4, 2024Publication date: October 31, 2024Applicant: Shanghai WUQI Microelectronics Co., Ltd.Inventors: Qiang GU, Jinbang ZONG
-
Publication number: 20240235498Abstract: Bias circuits for CMOS power amplifiers are provided. The bias circuit includes a feedback module, a first bias module, and a second bias module. The feedback module has a first input connected to a output common mode voltage, a second input connected to a reference voltage, and an output connected to gates of main amplification transistors in a first differential amplification module; based on a difference between the output common mode voltage and the reference voltage, the feedback module adjusts gate voltages of main amplification transistors until the output common mode voltage is equal to the reference voltage; the first bias module provides bias voltages for the first differential amplification module; the second bias module provides bias voltages for a second differential amplification module. The present disclosure adopts direct negative feedback and cascoded current mirrors, which realize accurate DC gate bias and accurate control of the output common mode voltage.Type: ApplicationFiled: February 15, 2023Publication date: July 11, 2024Applicant: Shanghai WUQI Microelectronics Co., Ltd.Inventor: Qiang GU
-
Publication number: 20240235492Abstract: An amplification circuit for RF power amplifiers is provided. The circuit includes two PMOS amplification modules and two NMOS amplification modules; each module includes a CSCG structure composed of a stack of K transistors. The first PMOS module and the first NMOS module are connected in series between a supply voltage and ground; gates of main amplification transistors of the first PMOS module and the first NMOS module are connected to a non-inverting input, and outputs of the first PMOS module and the first NMOS module are connected together to form an inverting output. The second PMOS module and the second NMOS module are similarly connected. Both the first and the second modules will be connected side-by-side as a pseudo differential structure to provide double push-pull function to the load. The present disclosure simultaneously achieves high power efficiency, and high linearity.Type: ApplicationFiled: February 15, 2023Publication date: July 11, 2024Applicant: Shanghai WUQI Microelectronics Co., Ltd.Inventor: Qiang GU
-
Publication number: 20240136982Abstract: An amplification circuit for RF power amplifiers is provided. The circuit includes two PMOS amplification modules and two NMOS amplification modules; each module includes a CSCG structure composed of a stack of K transistors. The first PMOS module and the first NMOS module are connected in series between a supply voltage and ground; gates of main amplification transistors of the first PMOS module and the first NMOS module are connected to a non-inverting input, and outputs of the first PMOS module and the first NMOS module are connected together to form an inverting output. The second PMOS module and the second NMOS module are similarly connected. Both the first and the second modules will be connected side-by-side as a pseudo differential structure to provide double push-pull function to the load. The present disclosure simultaneously achieves high power efficiency, and high linearity.Type: ApplicationFiled: February 15, 2023Publication date: April 25, 2024Applicant: Shanghai WUQI Microelectronics Co., Ltd.Inventor: Qiang GU
-
Publication number: 20240136985Abstract: Bias circuits for CMOS power amplifiers are provided. The bias circuit includes a feedback module, a first bias module, and a second bias module. The feedback module has a first input connected to a output common mode voltage, a second input connected to a reference voltage, and an output connected to gates of main amplification transistors in a first differential amplification module; based on a difference between the output common mode voltage and the reference voltage, the feedback module adjusts gate voltages of main amplification transistors until the output common mode voltage is equal to the reference voltage; the first bias module provides bias voltages for the first differential amplification module; the second bias module provides bias voltages for a second differential amplification module. The present disclosure adopts direct negative feedback and cascoded current mirrors, which realize accurate DC gate bias and accurate control of the output common mode voltage.Type: ApplicationFiled: February 15, 2023Publication date: April 25, 2024Applicant: Shanghai WUQI Microelectronics Co., Ltd.Inventor: Qiang GU
-
Patent number: 11589151Abstract: An audio data communication method and a wireless audio system are disclosed. The audio data communication method is performed by dual-channel wireless audio equipment that includes a primary audio device, a secondary audio device, and a communication link with an audio source device. The method includes transmitting, by the source device, audio data in a preset time interval to the primary and secondary audio devices. The primary and secondary audio devices generate first feedback information and second feedback information. The first and second feedback information are transmitted to the audio source device based on a Carrier Sense Multiple Access/Collision Avoidance protocol. The disclosed techniques address issues such as information interaction between the primary and secondary audio devices during transmission of the feedback information.Type: GrantFiled: June 2, 2022Date of Patent: February 21, 2023Assignee: Shanghai WuQi Microelectronics Co., Ltd.Inventor: Da Liu