Patents Assigned to SHANNON SYSTEMS LTD.
  • Patent number: 11723158
    Abstract: An electronic device with storage functionality is provided. The electronic device includes a first housing member, a first circuit board, a second housing member and a second circuit board. The first circuit board is connected to the first housing member. The second circuit board is coupled to the first circuit board and is parallel to the first circuit board. The first housing member includes two hooks, and the hooks are wedged against the first edge of the second circuit board.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: August 8, 2023
    Assignee: SHANNON SYSTEMS LTD.
    Inventor: Jiangshan Li
  • Patent number: 11700707
    Abstract: A memory device includes a device housing, a memory module, and a cooling unit. The memory module is disposed in the device housing, wherein the memory module generates heat, and the heat is transmitted to the device housing. The cooling unit is thermally connected to the device housing to dissipate some of the heat. The cooling unit includes a unit housing and a working fluid. An interior space is formed in the unit housing. The working fluid is disposed in the interior space, wherein some of the heat travels from the device housing, passes through the unit housing, and is transmitted to the working fluid.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: July 11, 2023
    Assignee: SHANNON SYSTEMS LTD.
    Inventor: Jiangshan Li
  • Patent number: 11635901
    Abstract: Space allocation for non-volatile memory is shown. A controller establish a first namespace set by allocating the non-volatile memory in units of a first storage unit, and establishes a second namespace set by allocating the non-volatile memory in units of a second storage unit. The first storage unit is bigger than or equal to the second storage unit, and the first storage unit has better input and output isolation than the second storage unit. The first namespace set and the second namespace set are in the different tiers in a hierarchical storage architecture.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: April 25, 2023
    Assignee: SHANNON SYSTEMS LTD.
    Inventor: Xueshi Yang
  • Patent number: 11632878
    Abstract: An add-in module is provided. The add-in module includes a substrate, a plurality of first heat sources, a plurality of second heat sources, a heat sink and a heat-dissipation plate. The substrate includes a first substrate surface and a second substrate surface. The first substrate surface is opposite the second substrate surface. The first heat sources are disposed on the first substrate surface. The second heat sources are disposed on the second substrate surface. The heat sink corresponds to the first substrate surface and is thermally connected to the first heat sources, wherein the heat sink includes a heat-sink base and a plurality of heat-dissipation fins, and the heat-dissipation fins are connected to the heat-sink sink base. The heat-dissipation plate corresponds to the second substrate surface and is thermally connected to the second heat sources.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: April 18, 2023
    Assignee: SHANNON SYSTEMS LTD.
    Inventor: Jiangshan Li
  • Patent number: 11606866
    Abstract: An electronic device with a storage function is provided. The electronic device includes a main connection bolt and a housing. The housing includes a first housing member and a second housing member. The first housing member includes two hooks and a fastening portion. The second housing member includes two wedging portions and a fastening base. The hooks are wedged into the wedging portions to restrict the freedom of the first housing member to move relative to the second housing member in a first direction. The main connection bolt connects the fastening portion to the fastening base in a second direction to restrict the freedom of the first housing member to move relative to the second housing member in the first direction. The first direction is perpendicular to the second direction.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: March 14, 2023
    Assignee: SHANNON SYSTEMS LTD.
    Inventor: Jiangshan Li
  • Patent number: 11520698
    Abstract: A key-value storage architecture with data compression is shown. During the garbage collection, the controller compresses valid pieces of key-value data to generate a piece of compressed data. Each piece of key-value data is in key-value format. The controller codes the piece of compressed data to generate a first piece of compressed key-value data that is also in key-value format, and programs the first piece of compressed key-value data into the non-volatile memory.
    Type: Grant
    Filed: December 24, 2020
    Date of Patent: December 6, 2022
    Assignee: SHANNON SYSTEMS LTD.
    Inventors: Chao Chen, Ningzhong Miao
  • Patent number: 11402995
    Abstract: A key-value storage architecture with data compression is shown. A computing unit is configured to estimate the average compression rate factor of a non-volatile memory. The computing unit is further configured to estimate storage space consumption of the non-volatile memory based on the average compression rate factor, and programming of the non-volatile memory is prohibited if to the storage space consumption exceeds a predefined threshold. The average compression rate factor is dynamically updated, and is a weighted result of compression rate factors of several storage units of the non-volatile memory.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: August 2, 2022
    Assignee: SHANNON SYSTEMS LTD.
    Inventors: Chao Chen, Ningzhong Miao
  • Patent number: 11099856
    Abstract: The invention introduces a method for uninstalling SSD (Solid-state Disk) cards, performed by a processing unit when loading and executing a driver, including at least the following steps: reading the value of the register of an SSD card on which there is an access attempt according to a data access command in the time period between reception of the data access command from an application and transmission of a data access request corresponding to the data access command to lower layers; and executing an uninstall procedure when detecting that the SSD card has been removed according to a result of the reading.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: August 24, 2021
    Assignee: SHANNON SYSTEMS LTD.
    Inventor: Ningzhong Miao
  • Patent number: 10963335
    Abstract: A data storage device is provided. The data storage device includes a flash memory and a controller. The flash memory includes a plurality of blocks for storing data and each block includes a plurality of pages. The controller is configured to convert a host read command into a read-operation instruction to the flash memory to perform a default read operation to read page data from the flash memory. The default read operation has a default read threshold voltage. In response to a failure of the default read operation, the controller is configured to sequentially perform a read operation on the flash memory using a read threshold voltage with respect to each entry of a plurality of entries in a read-retry table, and replace the default read threshold voltage with the read threshold voltage corresponding to the read operation being successfully performed.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: March 30, 2021
    Assignee: SHANNON SYSTEMS LTD.
    Inventor: Xueshi Yang
  • Patent number: 10936482
    Abstract: A method for controlling an SSD (Solid State Disk), performed by a processing unit when loading and executing a driver, including: obtaining a data access command including information indicating a namespace, a command type, and a logical storage address; determining one of a plurality of storage mapping tables according to the namespace; reading a physical location corresponding to the logical storage address from the determined storage mapping table; generating a data access request including information indicating a request type and the physical location; and issuing the data access request to a SSD.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: March 2, 2021
    Assignee: SHANNON SYSTEMS LTD.
    Inventor: Ningzhong Miao
  • Patent number: 10896003
    Abstract: A data storage device with interruption optimization having a non-volatile memory and a controller is shown. The controller operates the non-volatile memory in response to a host. The controller has a buffer which is filled with an interrupt delay that is evaluated by the host according to the status of the central processing unit of the host. The controller delays sending an interrupt request to the host according to the interrupt delay.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: January 19, 2021
    Assignee: SHANNON SYSTEMS LTD.
    Inventor: Zhen Zhou
  • Patent number: 10817415
    Abstract: A data storage device and method for operating a non-volatile memory including device based space allocation and host-based mapping table searching. In response to a write command from a host that indicates a write logical address in metadata in the write command, a controller at the device end determines a write physical address and allocates the non-volatile memory to provide a space to store write data at the write physical address. The controller transmits the write physical address to the host so the host can establish a mapping table on the host. When filling a completion queue in the host to inform the host of the finishing or completion of the write command, the controller also returns the write physical address to the completion queue for the host to update the mapping table on the host in real time. The metadata programmed at the device end is read back with the read data for read data verification at the host end.
    Type: Grant
    Filed: April 19, 2018
    Date of Patent: October 27, 2020
    Assignee: SHANNON SYSTEMS LTD.
    Inventor: Zhen Zhou
  • Patent number: 10663997
    Abstract: Voltage regulation techniques for providing stable power to the components mounted on an electronic device circuit board are presented. In addition to a first component and a second component, a voltage converter and a power line are provided on the electronic device circuit board. The voltage converter converts an external voltage to an internal voltage that is conveyed through the power line. The first component is coupled to the power line to get power via a first power supply point on the power line. The second component is coupled to the power line to get power via a second power supply point on the power line. A first feedback terminal is provided on the power line between the first power supply terminal and the second power supply terminal. The voltage converter regulates the internal voltage based on a voltage value retrieved from the first feedback terminal.
    Type: Grant
    Filed: July 4, 2019
    Date of Patent: May 26, 2020
    Assignee: SHANNON SYSTEMS LTD.
    Inventor: Shuhua Zhou
  • Patent number: 10636506
    Abstract: The invention introduces a method for testing a storage unit, performed by a processing unit, including at least the following steps: after receiving a test write command from a host device through a first access interface, directing a second access interface to receive a first test pattern from a test writer and program the first test pattern into a PBA (Physical Block Address) of a storage unit; directing the second access interface to read a second test pattern from the PBA of the storage unit and output the second test pattern to a test reader; receiving a test result from the test reader; and generating a test message according to the test result and replying with the test message to the host device.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: April 28, 2020
    Assignee: SHANNON SYSTEMS LTD.
    Inventor: Zhen Zhou
  • Patent number: 10528285
    Abstract: A data storage device capable of just partially executing a read/write command issued by a host is disclosed. The data storage device uses a controller to perform a partial execution of a first read/write command issued by the host, and returns a breakpoint of the first read/write command to the host and returns information that the first read/write command is in a partial completion status to the host to drive the host to further issue a second read/write command. In this manner, fewer computational resources are required in determining read/write command granularity.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: January 7, 2020
    Assignee: SHANNON SYSTEMS LTD.
    Inventor: Zhen Zhou
  • Patent number: 10477706
    Abstract: A solid state memory device is provided. The solid state memory device includes a housing and a solid state memory module. The housing includes a housing fastening member, a first housing member, and a second housing member, wherein the second housing member is connected to the first housing member. The solid state memory module is disposed in the housing. The first housing member includes a plurality of first wedging portions, and the second housing member includes a plurality of second wedging portions. Each first wedging portion wedges the corresponding second wedging portion in a first direction. The first housing member further includes a first fastening portion, and the second housing member further includes a second fastening portion. The housing fastening member affixes the first fastening portion to the second fastening portion in a second direction, wherein the first direction differs from the second direction.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: November 12, 2019
    Assignee: SHANNON SYSTEMS LTD.
    Inventors: Xinglong Wang, Jiangshan Li
  • Patent number: 10474214
    Abstract: An apparatus and method for monitoring the power storage capability of a secondary power source of a data storage device is provided. A capacitor is used as a secondary power source. A charging path and a discharging path are selectively generated for the capacitor. After being charged through the charging path, the capacitor is then discharged through the discharging path while the charging path is disconnected from the capacitor. Then, the capacitor is checked to determine whether its voltage level has dropped below a threshold level and thereby an evaluation result obtained from evaluating the capacitor is generated.
    Type: Grant
    Filed: August 3, 2017
    Date of Patent: November 12, 2019
    Assignee: SHANNON SYSTEMS LTD.
    Inventor: Xiawei Ye
  • Patent number: 10446252
    Abstract: A data storage device with high security is disclosed. A nonvolatile memory provides a storage space divided into a plurality of first-level cells. The first-level cells are grouped into a plurality of second-level cells with each second-level cell containing several first-level cells. Each of the plurality of first-level cells is provided with checking and correcting code by a control unit. When reading a specified first-level cell, the control unit checks data in the specified first-level cell based on the checking and correcting code of the specified first-level cell and thereby performs a self-test on another space of a specified second-level cell. The specified first-level cell is provided in the specified second-level cell.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: October 15, 2019
    Assignee: SHANNON SYSTEMS LTD.
    Inventor: Xueshi Yang
  • Patent number: 10445231
    Abstract: A method and system provide for storage device metadata management. The storage device metadata management method comprises: a superblock is formed of at least one erase block; the superblock reserves a space for storing metadata related to the superblock; the metadata related to the superblock comprises a serial number distributed to the superblock and address mapping information in the superblock; the address mapping information stores a mapping relationship of a physical block address to a logic block address (S1); when data is written into the superblock, the address mapping information corresponding to the data is also written into the superblock (S2); when a system is recovered, a page table of the storage system is recovered according to the address mapping information of the superblock; the page table marks a mapping relationship of a logic block address to a physical block address (S3).
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: October 15, 2019
    Assignee: SHANNON SYSTEMS LTD.
    Inventors: Zhen Zhou, Xueshi Yang
  • Patent number: 10402118
    Abstract: The invention introduces a method for atomic writes in an SSD (Solid State Disk) system, performed by a processing unit, including at least the following steps. An atomic-write command instructing the processing unit to write first data whose length is less than a page length in a storage unit is received. When it is determined that the atomic-write command will trigger a cross-page buffering of a buffer, dummy data is filled into all available sub-regions of a first region of the buffer, and the first data is stored in a second region of the buffer. After the first data is successfully stored in the second region of the buffer, a safe pointer is modified to point to the end address of the last sub-region of the second region, which stores the first data.
    Type: Grant
    Filed: November 17, 2016
    Date of Patent: September 3, 2019
    Assignee: SHANNON SYSTEMS LTD.
    Inventors: Zhen Zhou, Ningzhong Miao