Abstract: The present invention provides a thin film transistor substrate and a display device that prevent peeling. The thin film transistor substrate includes: an insulating substrate; a thin film transistor; a first inorganic insulating layer; an organic insulating layer stacked on the first inorganic insulating layer; and a second inorganic insulating layer stacked on the organic insulating layer. The organic insulating layer includes a side covered with the second inorganic insulating layer. The first inorganic insulating layer may contain silicon oxide. The organic insulating layer may contain photosensitive resin. The second inorganic insulating layer may contain silicon nitride.
Type:
Grant
Filed:
August 22, 2013
Date of Patent:
March 14, 2017
Assignee:
Sharp Kabushiki Kiasha
Inventors:
Yoshimasa Chikama, Yukinobu Nakata, Tetsuya Yamashita, Jun Nishimura
Abstract: A MOS transistor is featured by providing mult-layered covering elements for covering a channel region of the semiconductor device. Each of the covering elements is interposed by an insulating layer. Preferably, the covering layers comprise first and second covering layers neither of which are connected to either of the drain electrode, the source electrode, or the gate electrode. A field plate layer, as a third covering layer, is disposed over the first and second covering layers.