Abstract: A method is provided for promoting adhesion of CVD copper to diffusion barrier material in integrated circuit manufacturing. The method includes depositing a first seed layer of copper on the barrier material by chemical vapor deposition (CVD) using (hfac)Cu(1,5-Dimethylcyclooctadiene) precursor. Following the deposition of the seed layer, which strongly adheres and conforms to the copper receiving surfaces on the diffusion barrier, the wafer substrate is positioned in an electro-chemical deposition apparatus, such as an electroplating or electroless plating bath. A second layer of copper is then deposited on the seed layer by means of electrochemical deposition, e.g., electroplating or electroless plating. The second layer of copper deposited by electro-chemical deposition is a “fill” or “bulk” layer, substantially thicker than the seed layer.
Type:
Grant
Filed:
November 6, 1998
Date of Patent:
September 4, 2001
Assignees:
Advanced Technology Materials, Inc., Sharp Microelectronics Technology Inc.
Inventors:
Lawrence J. Charneski, Tuc Nguyen, Gautam Bhandari
Abstract: A method of, and apparatus for, decoupling a defective or otherwise non-operational memory block from the power lines of a memory device is disclosed. Defects which cause excessive current consumption in defective memory blocks can be repaired through this approach. Mass-production yields can be improved significantly.
Abstract: A Quasi Radix-16 Butterfly comprises an radix-4 butterfly processor and on-board memory with external memory addressing changes from a conventional radix-4 butterfly processor. On-chip cache memory is included to store data outputs of the radix-4 butterfly processor for application as data inputs to the radix-4 butterfly processor in a second series of butterfly operations to implement high-speed processing that is maximally execution-bound.