Patents Assigned to Sharp Semiconductor Innovation Corporation
  • Patent number: 11843012
    Abstract: A solid-state imaging device includes: a plurality of pixels arranged in a matrix form on a substrate, wherein the plurality of pixels each include a photoelectric conversion region disposed inside the substrate and configured to convert light entering the substrate into charge, a charge retaining region disposed more on a side from which the light enters, than the photoelectric conversion region inside the substrate and configured to retain the charge converted in the photoelectric conversion region, an indented region indented from a surface of the substrate on the side from which the light enters, toward the photoelectric conversion region to at least a depth corresponding to the charge retaining region, and a light blocking film formed covering the charge retaining region at the surface side of the substrate and extending along a side wall of the indented region.
    Type: Grant
    Filed: November 5, 2021
    Date of Patent: December 12, 2023
    Assignee: Sharp Semiconductor Innovation Corporation
    Inventor: Takanori Usuki
  • Patent number: 11842680
    Abstract: A semiconductor device includes the following: a light measuring instrument disposed opposite the display surface of a display panel provided with a self-emission element, and disposed for measuring the ambient-light illuminance of the display panel; a storage device configured to store a plurality of first measurements measured by the light measuring instrument in synchronization with a synchronizing signal of the display panel during a plurality of first measurement periods that are shorter than an ON/OFF period of the self-emission element; and a calculation unit configured to calculate the light emission illuminance of the self-emission element in accordance with the plurality of first measurements stored in the storage device, and configured to calculate the ambient-light illuminance by subtracting a value based on the light emission illuminance from a second measurement measured by the light measuring instrument during a second measurement period that is longer than the plurality of first measurement pe
    Type: Grant
    Filed: November 16, 2022
    Date of Patent: December 12, 2023
    Assignee: Sharp Semiconductor Innovation Corporation
    Inventors: Isamu Kawabe, Takahiro Inoue, Takayuki Shimizu, Kohji Hamaguchi, Tetsuro Ikeda
  • Patent number: 11774345
    Abstract: A detection mechanism includes a light source disposed on a substrate, a condensing lens disposed between the substrate and light emitted from the light source, and a photodetector disposed on the substrate and under the condensing lens.
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: October 3, 2023
    Assignee: Sharp Semiconductor Innovation Corporation
    Inventors: Daiki Naruse, Toshiya Fujiyama, Hirokazu Sasabe, Yoshifumi Masuda, Mitsutoshi Okami, Noboru Takeuchi
  • Patent number: 11757453
    Abstract: A multi-bit gray code generation circuit includes: a zeroth bit gray code generation circuit configured to generate a gray code corresponding to a bit 0 of a multi-bit gray code; and a plurality of gray code generation circuits each configured to generate a gray code corresponding to each bit higher than the bit 0 of the multi-bit gray code. Each of the plurality of gray code generation circuits is constituted by a plurality of flip-flop circuits. An output of a flip-flop circuit in the previous stage is input to a flip-flop circuit of the next stage. An output of a flip-flop circuit of the final stage is inverted and held by a flip-flop circuit of the first stage. An output of one of the plurality of flip-flop circuits is output as a gray code corresponding to each bit.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: September 12, 2023
    Assignee: Sharp Semiconductor Innovation Corporation
    Inventor: Yoshinao Morikawa
  • Patent number: 11508436
    Abstract: A memory device includes: a cell array that includes a first region including first memory cells and a second region including second memory cells; first word lines connected to each of the first memory cells; second word lines connected to each of the second memory cells; a first bit line commonly connected to the first memory cells and the second memory cells; a row decoder that selects one of the first word lines and one of the second word lines in parallel during a data read operation; and a sense amplifier between the first region and the second region and electrically connected to the first bit line during the data read operation.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: November 22, 2022
    Assignees: Sharp Semiconductor Innovation Corporation, TOHOKU UNIVERSITY
    Inventors: Yoshihisa Sekiguchi, Tetsuo Endoh
  • Patent number: 11488531
    Abstract: A proximity sensor comprises a light emitting element configured to emit light; a synchronization signal input unit configured to be input with a synchronization signal which is output from a display device and which indicates a rewrite timing of an image displayed on a display screen; and an emission controller configured to control emission of the light from the light emitting element, wherein the emission controller is configured to cause the light emitting element to start the emission of the light at a start timing set based on the rewrite timing at which rewriting of one of a plurality of scanning lines of the image is caused to start in the specific display region, and an emission time of the light from the light emitting element, and the emission controller is configured to cause the light emitting element to end the emission of the light before the rewrite timing comes.
    Type: Grant
    Filed: June 11, 2021
    Date of Patent: November 1, 2022
    Assignee: Sharp Semiconductor Innovation Corporation
    Inventors: Kohji Hamaguchi, Takahiro Inoue, Masaya Ohnishi, Isamu Kawabe
  • Patent number: 11322221
    Abstract: A memory device includes: a memory cell capable of holding data; and an ECC circuit capable of generating a correction code and detecting an error based on the correction code. The memory cell is accessed by a pipeline operation. The pipeline operation includes at least four pipeline stages including a read cycle reading data from the memory cell, an ECC cycle executing generation of the correction code or error detection for the memory cell in the ECC circuit, a wait cycle during which processing for data related to the memory cell is not executed, and a write cycle writing data into the memory cell.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: May 3, 2022
    Assignees: Sharp Semiconductor Innovation Corporation, TOHOKU UNIVERSITY
    Inventors: Shigeo Ohyama, Tetsuo Endoh