Patents Assigned to Sharp
  • Publication number: 20110141402
    Abstract: A lighting device 12 of the present invention includes a light source 33, a chassis 14 configured to house the light source 33, a heat conductive part 24 that transfers heat generated from the light source 33, and a columnar member 50 that keeps a shape of the chassis 14. The columnar member 50 is configured by a hollow member that is provided on a side of the chassis 14 opposite from a side facing the light source 33, and the hollow member has an openings 52a, 52b that communicate inside with outside of the hollow member. The heat conductive part 24 is provided on a part of the chassis 14 that overlaps with the light source 33 and extends from the part overlapping with the light source 33 to a part of the chassis 14 that overlaps with the columnar member 50.
    Type: Application
    Filed: June 8, 2009
    Publication date: June 16, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Keiji Hayashi
  • Patent number: 7960417
    Abstract: The present invention is directed to benzazole compounds which are potentiators of metabotropic glutamate receptors, including the mGluR2 receptor, and which are useful in the treatment or prevention of neurological and psychiatric disorders associated with glutamate dysfunction and diseases in which metabotropic glutamate receptors are involved. The invention is also directed to pharmaceutical compositions comprising these compounds and the use of these compounds and compositions in the prevention or treatment of such diseases in which metabotropic glutamate receptors are involved.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: June 14, 2011
    Assignee: Merck Sharp & Dohme Corp.
    Inventors: Steven P. Govek, Jean-Michel Vernier, Theodore Kamenecka, John H. Hutchinson, Richard Pracitto
  • Patent number: 7960296
    Abstract: A spin addition method for catalyst elements is simple and very important technique, because the minimum amount of a catalyst element necessary for crystallization can be easily added by controlling the catalyst element concentration within a catalyst element solution, but there is a problem in that uniformity in the amount of added catalyst element within a substrate is poor. The non-uniformity in the amount of added catalyst element within the substrate is thought to influence fluctuation in crystallinity of a crystalline semiconductor film that has undergone thermal crystallization, and exert a bad influence on the electrical characteristics of TFTs finally structured by the crystalline semiconductor film. The present invention solves this problem with the aforementioned conventional technique.
    Type: Grant
    Filed: November 12, 2008
    Date of Patent: June 14, 2011
    Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki Kaisha
    Inventors: Misako Nakazawa, Toshiji Hamatani, Naoki Makita
  • Patent number: 7961736
    Abstract: A method of converting application data to transport data in a power line communication system includes receiving application data from an application in a device through a service access point. The connection type and connection specification for the application data is then analyzed to determine if a connection exists for the application data. If a connection exists for the application data, mapping the application data is mapped into transport data.
    Type: Grant
    Filed: September 15, 2003
    Date of Patent: June 14, 2011
    Assignee: Sharp Laboratories of America, Inc.
    Inventor: Deepak Ayyagari
  • Patent number: 7961280
    Abstract: In a semi-transmissive liquid crystal display device (50a) including an active matrix substrate (20a), the active matrix substrate (20a) includes a plurality of source lines (2), a first transparent electrode (2c) connected to each source line (2) through a TFT (5), an interlayer insulating film (12) provided on the first transparent electrode (2c) and having an opening (12a), a reflective electrode (6) provided on the interlayer insulating film (12) and connected to the first transparent electrode (2c) through the opening (12a), and a second transparent electrode (7a) overlapping the reflective electrode (6a) and the first transparent electrode (2c) and connected to the reflective electrode (6a) and the first transparent electrode (2c). In each pixel, respective outer peripheral ends (E) of the reflective electrode (6a) and the second transparent electrode (7a) are aligned with each other.
    Type: Grant
    Filed: January 9, 2007
    Date of Patent: June 14, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kazuyoshi Fujioka, Masaaki Saitoh, Toshiyuki Tanaka, Masakatsu Tominaga, Tetsuo Fujita, Yuji Suehiro, Hijiri Nakahara, Kazuhiro Yoshikawa
  • Patent number: 7962067
    Abstract: An image forming apparatus including: a first and a second photoconductor groups constituted of one or more photoconductors respectively; a first and a second drive control sections for controlling the drive of the first and the second photoconductor groups respectively to rotate the photoconductors thereof, wherein the rotational phases of the first photoconductor group and the second photoconductor group are adjusted to be matched therebetween; and the first and the second drive control sections control so that the first and the second photoconductor groups are driven simultaneously with an equal target speed during a formation of a image, wherein an initial drive speed is lower than a predetermined speed for image-formation, and after the first and the second photoconductor groups reaches the initial drive speed, the target speed is changed from the initial drive speed to the speed for image-formation.
    Type: Grant
    Filed: April 8, 2009
    Date of Patent: June 14, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kenichi Isomi, Tetsushi Ito, Hirotsugu Akamatsu, Tetsuya Yamaguchi, Shuichi Mochizuki
  • Patent number: 7961451
    Abstract: An ion generating element includes a positive ion discharger for generating positive ions and a negative ion discharger for generating negative ions. The ion dischargers are arranged separately from and independently of each other with a distance securing insulation between them. At least one of the dischargers includes a discharging portion for causing electric discharge, and a conducting portion having a voltage same as the discharging portion. The conducting portion surrounds a perimeter or part of the discharging portion. The conducting portion may surround a perimeter or part of the discharging portion so as to partition the ion dischargers from each other.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: June 14, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshinori Sekoguchi, Ichiro Tokai, Hiromu Nishida, Satoshi Takahashi
  • Patent number: 7962316
    Abstract: The present invention provides a method for identifying siRNA target motifs in a transcript using a position-specific score matrix approach. The invention also provides a method for identifying off-target genes of an siRNA using a position-specific score matrix approach. The invention further provides a method for designing siRNAs with higher silencing efficacy and specificity. The invention also provides a library of siRNAs comprising siRNAs with high silencing efficacy and specificity.
    Type: Grant
    Filed: October 27, 2004
    Date of Patent: June 14, 2011
    Assignee: Merck Sharp & Dohme Corp.
    Inventors: Aimee L. Jackson, Steven R. Bartz, Julja Burchard, Peter S. Linsley, Wei Ge, Guy L. Cavet
  • Patent number: 7960937
    Abstract: A miniaturizable, low-cost highly reliable inverter unit. A control circuit section for controlling operating timing of high breakdown voltage semiconductor elements included in an inverter circuit section and first and second drive and abnormality detection circuit sections for outputting drive signals for driving the high breakdown voltage semiconductor elements according to the operating timing and for feeding back an abnormality of the inverter circuit section to the control circuit section are formed on an SOI substrate as one integrated circuit chip. On the integrated circuit chip, circuit formation areas which differ in reference potential are separated from one another by dielectrics. A plurality of level shifters for transmitting signals exchanged between circuit formation areas separated by the dielectrics are formed.
    Type: Grant
    Filed: September 7, 2005
    Date of Patent: June 14, 2011
    Assignees: Fuji Electric Systems Co., Ltd., Sharp Kabushiki Kaisha, Honda Motor Co., Ltd.
    Inventors: Hitoshi Sumida, Akinobu Teramoto, Ken-ichi Nonaka, Toshio Naka
  • Patent number: 7961199
    Abstract: Embodiments of the present invention comprise systems, methods and devices for adjusting image code values in conjunction with display light source illumination levels for enhanced image display.
    Type: Grant
    Filed: September 12, 2005
    Date of Patent: June 14, 2011
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Louis Joseph Kerofsky, Scott J. Daly, Michiyuki Sugino
  • Patent number: 7961165
    Abstract: A liquid crystal display device includes a plurality of pixels, each of which includes a liquid crystal capacitor made up of a liquid crystal layer and two electrodes to apply a voltage to the liquid crystal layer. While the device is conducting a display operation, an oscillation voltage, which oscillates a number of times within a single vertical scanning period, and a predetermined gray-scale voltage are applied to the liquid crystal capacitor of an arbitrary one of the pixels.
    Type: Grant
    Filed: August 25, 2004
    Date of Patent: June 14, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Fumikazu Shimoshikiryoh
  • Patent number: 7961336
    Abstract: Recording of time information and function information of each image forming process for which processing has been completed in a recording portion 64 (S1), judgment (S6) of whether or not a switching time that has been set is 0 for processing in which the elapsed time from completion to the present time is within a predetermined time for processing among the information in the recording portion (64), calculation (S7) of a time (T) in which the switching time is added to the completion time of each image forming process, comparison (S8) of the time (T) and a time information (Tmax), and update (S9) of the time information (Tmax) by the time (T) when the calculated time (T) is later than the time information (Tmax) are repeatedly executed, and the latest time is set to the time information (Tmax). Switching is made to a power-saving mode when a counter (66) has timed the time information (Tmax).
    Type: Grant
    Filed: May 19, 2004
    Date of Patent: June 14, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kazuya Iwabayashi, Yusuke Nagano
  • Patent number: 7961653
    Abstract: A home gateway is an apparatus that transmits information, which is received from an intercom slave unit, to a plurality of appliances each having a communication function. The home gateway includes a demultiplexing circuit, a wireless communication circuit, a memory, a video codec circuit, and a CPU. The demultiplexing circuit receives information from the intercom slave unit. The wireless communication circuit communicates with the plurality of appliances. The memory stores profiles and levels. The video codec circuit converts image information received from the intercom slave unit according to a profile and a level. The CPU controls the wireless communication circuit and the video codec circuit. Thereby, various data can be transmitted regardless of structures and performance capabilities of the appliances.
    Type: Grant
    Filed: May 30, 2006
    Date of Patent: June 14, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Akira Yamamoto
  • Patent number: 7961266
    Abstract: An array substrate in which a short circuit between a line branch of an auxiliary capacitance line and a pixel electrode can be easily corrected comprises the pixel electrode connected to a switching element arranged near the intersection between a scanning line and a signal line and the auxiliary capacitance line arranged in a layer below the pixel electrode, wherein the auxiliary capacitance line comprises a line trunk arranged substantially parallel to the scanning line and a line branch extending from the line trunk, and the pixel electrode is provided with an aperture which crosses the line branch of the auxiliary capacitance line.
    Type: Grant
    Filed: February 26, 2007
    Date of Patent: June 14, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Kenichi Kito
  • Patent number: 7962965
    Abstract: There is a provided a semiconductor device having a high security whose power consumption is difficult to analyze even without setting up random characteristic to the processing time. The semiconductor device includes a target circuit (14), a sub-target circuit (15) having the same circuit configuration as the target circuit (14), and a dummy bit string generation circuit (11) for generating a bit string of a dummy serial input signal to be inputted to the sub-target circuit (15) according to the bit string of the serial input signal of the target circuit (14).
    Type: Grant
    Filed: May 9, 2005
    Date of Patent: June 14, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Shigeo Ohyama
  • Patent number: 7961587
    Abstract: A method for using a numerical method to design reference signals for multiple input multiple output (MIMO) systems is described. An input multiple input multiple output signal is determined. A nearest tight frame to one or more given structured vectors is obtained. One or more structured vectors from the nearest tight frame are obtained. Orthogonal subsets are computed for a plurality of sequences, wherein each of the subsets is replaced with a matrix that comprises a function of one or more elements in each of the plurality of sequences and an identity matrix associated with the one or more elements. The one or more structured vectors are projected onto the space of circulant matrices. One or more classes of matrices associated with reference signals are outputted.
    Type: Grant
    Filed: July 9, 2007
    Date of Patent: June 14, 2011
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: John M. Kowalski, Huaming Wu
  • Patent number: 7961963
    Abstract: Embodiments of the present invention comprise systems and methods for modification of motion vectors in spatial scalable video coding. Some embodiments of the present invention comprise methods and systems designed for use with the Scalable Video Coding extension of H.264/MPEG-4 AVC.
    Type: Grant
    Filed: February 7, 2006
    Date of Patent: June 14, 2011
    Assignee: Sharp Laboratories of America, Inc.
    Inventor: Shijun Sun
  • Patent number: 7960409
    Abstract: The instant invention provides compounds of Formula I which are leukotriene biosynthesis inhibitors. Compounds of Formula I are useful as anti-atherosclerotic, anti-asthmatic, anti-allergic, anti-inflammatory and cytoprotective agents.
    Type: Grant
    Filed: February 1, 2008
    Date of Patent: June 14, 2011
    Assignee: Merck Sharp & Dohme Corp.
    Inventors: Erich L. Grimm, Yves Ducharme, Richard Frenette, Richard Friesen, Marc Gagnon, Helene Juteau, Sebastien Laliberte, Bruce MacKay, Yves Gareau
  • Publication number: 20110134380
    Abstract: To provide a production method of a liquid crystal display device and a liquid crystal display device, in which generation of a joint line on a display screen is suppressed and yield can be improved even if a substrate is subjected to an alignment treatment by completing exposure for the substrate through several exposures in a liquid crystal display device including pixels each having two or more domains.
    Type: Application
    Filed: December 3, 2010
    Publication date: June 9, 2011
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Iichiro INOUE, Hiroyuki Hakoi, Shinichi Terashita, Koichi Miyachi
  • Patent number: D639824
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: June 14, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Seiji Usami, Noriaki Itai, Akihiko Hotta