Abstract: The invention provides a pixel structure, an array substrate, and a display device. The pixel structure includes: scanning lines and data lines; at least one pixel electrode configured in each of pixel areas; at least one shading electrode line connecting to a common voltage, the shading electrode line being configured to be above the data line to shade the data line; a first TFT being configured between the scanning line and the pixel electrode, and the first TFT connecting to the pixel electrode; at least one shading electrode connection line extending along a direction of the scanning line, and the shading electrode connection line electrically connecting to two adjacent shading electrode lines; and the shading electrode connection line being wound to form a mesh pattern, and a semiconductor layer of the first TFT is configured to be opposite to a hollow area of the mesh pattern.

Abstract: The present application provides a display panel, a display module and a display device, the display panel includes a pixel electrode layer, at least one firstshading strip and at least one second shading strip; a pixel electrode layer is divided onto at least four pixel electrode regions by the first shading strip and the second shading strip, a plurality of branch electrodes are formed in the pixel electrode region; the branch electrodes in the two adjacent pixel electrode regions and a center line of the two adjacent pixel electrode regions are symmetrically disposed.

Abstract: A TFT substrate and a manufacturing method thereof are provided. In the manufacturing method, a metal oxide semiconductor layer is irradiated with UV light by using a gate as a shielding layer, such that a portion of the metal oxide semiconductor layer irradiated by the UV light is conductorized to form a source, a drain, and a pixel electrode, and a portion of the metal oxide semiconductor layer shielded by the gate still retains semiconductor properties to form a semiconductor channel. The invention achieves the alignment of the source and the drain with the gate by processes of self-alignment of the gate and conductorization of the metal oxide semiconductor layer, and can effectively control an overlapping region of the source and drain and the gate. Thereby, the parasitic capacitance is reduced, and the display quality is improved. Also, the manufacturing method is simple, and the production efficiency is improved.

Abstract: The present invention provides an amorphous silicon thin film transistor and a manufacturing method of the amorphous silicon thin film transistor, which comprise: a substrate, a gate electrode layer, a gate insulating layer, an active layer, a source/drain electrode layer, an N+-doped layer, a protective insulating layer, and a passivation layer. The N+-doped layer is disposed between the active layer and the source/drain electrode layer. The protective insulating layer is disposed on the source/drain electrode layer. A channel is formed in the source/drain electrode layer and penetrates the N+-doped layer and the protective insulating layer. The passivation layer covers the channel and the protective insulating layer. The protective insulating layer and the source/drain electrode layer are flush with each other in the channel.

Abstract: A display encapsulation structure and a manufacturing method thereof are provided. The manufacturing method includes steps of providing a sacrificial layer, a display device encapsulation structure, and a transparent cover; providing an encapsulating film layer; and removing the sacrificial layer to expose the transparent cover. The encapsulating film layer is removed from the transparent cover plate when the sacrificial layer is removed, so as to avoid affecting luminous efficiency by the encapsulating film layer, thereby improving the luminous efficiency of the display encapsulation structure.

Abstract: A display device system circuit and a display device are provided. The display device system circuit includes a power supply, a plurality of functional circuit modules and a plurality of ground wires corresponding to the plurality of functional circuit modules, respectively. Operating current input ends of the plurality of functional circuit modules are electrically connected to a positive electrode of the power supply, respectively. An operating current output end of each of the functional circuit modules is electrically connected to a negative electrode of the power supply via a corresponding ground wire. The functional circuit modules will not be interfered with each other, avoiding causing abnormal displaying by signal coupling between the functional circuit modules.

Abstract: The array substrate of embodiments of the present invention uses the adjustment dielectric layer to reduce parasitic capacitance between the gate metal layer and the electrode layer, thus avoiding the dark streak phenomenon due to the fringing electric field and the surrounding environment and improving display quality.

Abstract: This invention provides a display panel and a fabricating method thereof. Wherein the display panel defines a display area and an edge area. The display panel includes a substrate, a gate layer, a gate insulating layer, a thin film encapsulation layer, and a polyimide layer. By disposing a buffer tank on the gate insulating layer, the flow rate of the polyimide solution printed through inkjet printing in the edge region is reduced when the polyimide layer is forming, thereby causing it to solidify to form the polyimide layer before flowing over a retaining wall, and preventing sealant contamination and peeling.

Abstract: A thin film transistor (TFT) array substrate and a display panel are provided. The TFT array substrate has a base substrate, an anti-reflection layer, and a gate electrode insulating layer. The TFT array substrate has a light-transmitting region. The anti-reflection layer is disposed on the base substrate of the light-transmitting region. The gate electrode insulating layer is disposed on the anti-reflection layer. Light refractive indexes of the base substrate, the anti-reflection layer, and the gate electrode insulating layer are increasing sequentially.

Abstract: The invention provides an OLED display panel and manufacturing method thereof. The manufacturing method of OLED display panel of the invention forms a first scattering layer on the thin film encapsulation layer, a quantum dot layer on the first scattering layer, and a second scattering layer on the quantum dot layer. The first scattering layer extracts light from the OLED device, so that the light totally reflected by OLED device through thin film encapsulation layer is emitted as much as possible; the light extracted by the first scattering layer reaches the quantum dot layer. The quantum dots are excited to perform light color matching to emit light of desired color. Since the light excited by quantum dot layer is dispersed, the second scattering layer extracts the light excited by the quantum dot layer in an orderly manner, so that the OLED display panel emits light uniformly, thereby improving luminous efficiency.

Abstract: An electrode structure which includes a copper metal layer formed on a substrate, wherein the copper metal layer doped with a first metal ion within a first depth from upper surface, the first metal ion and the copper grain forming a copper alloy layer; the first depth being less than thickness of the copper metal layer, and the first metal ion being a metal ion having corrosion resistance and an ionic radius smaller than a gap between copper grains.

Abstract: A thin film transistor (TFT) and a method of manufacturing same are provided. A photoresist layer is dry-etched to form a tunnel before an active layer is formed, wherein a bottom of the tunnel is a copper trace layer. After that, two edges of the photoresist layer are aligned with two edges of the copper trace layer. Therefore, the photoresist layer won't protrude over an amorphous silicon layer to block the etching gas from etching the amorphous silicon layer. As a result, an aperture ratio of the TFT is increased, and quality of the TFT is improved. By forming an oxidation protective layer on the tunnel, the copper trace layer is prevented from being reacted with the etching gas to form a compound. Therefore, metals or compounds on the tunnel can be completely etched, and quality of the TFT is further improved.

Abstract: A collision machine for simulating collisions and a method of simulating collisions. The collision machine includes at least two collision units, each of the collision units comprising a housing, support structures, and at least two collision bodies. The support structures are located on two opposite surfaces of the housing for fixing a liquid crystal panel. The collision bodies are located below the support structures, and top surfaces of the collision bodies are in contact with a display surface of the liquid crystal panel for applying repeated impacts to the liquid crystal panel to generate bubbles in the liquid crystal panel by the repeated impacts. Each the collision bodies comprises a closed casing, a collision body located inside the casing, and a driving device for generating the repeated impacts.

Abstract: An OLED display device and a manufacturing method for the same are provided. The OLED display device includes a substrate, an organic light-emitting layer, a first encapsulation layer, a color filter layer, and a second encapsulation layer. Wherein the organic light-emitting layer is disposed on the substrate, the first encapsulation layer covers a surface of the organic light-emitting layer, the color filter layer is disposed on the first encapsulation layer, and the second encapsulation layer covers a surface of the color filter layer. In the present invention, the first encapsulation layer functions as a substrate of the color filter layer and is encapsulated by the first encapsulation layer and the second encapsulation layer, so that the CF substrate is omitted, the thickness of the entire display device is reduced, and flexibility is achieved.

Abstract: The present invention teaches a TFT array substrate, including a substrate; a first metallic layer disposed on the substrate; a gate insulation layer disposed on the first metallic layer and the substrate, where the gate insulation layer includes a level section above the first metallic layer and a pair of step sections respectively connected to lateral sides of the level section; a second metallic layer disposed on the level section, where an area of the second metallic layer's vertical projection onto the top side of the substrate is smaller than an area of the level section's top side; and a protection layer disposed on the second metallic layer and the gate insulation layer. As the second metallic layer is withdrawn for a distance from the level section's circumference, the protection layer is not required to rise continuously, and the protection layer is less prone to broken film and oxidization.

Abstract: An IPS display panel is disclosed. The panel includes an array substrate and a color filter substrate disposed in parallel and oppositely; and a liquid crystal layer disposed there between; wherein the array substrate includes a base substrate, a pixel electrode, an insulation layer, and a common electrode, the base substrate includes multiple data lines deposed in parallel and at intervals, the base substrate is disposed in parallel with and opposite to the color filter substrate, the pixel electrode is located at a surface of the base substrate facing the color filter substrate, the insulation layer covers a surface of the pixel electrode away from the base substrate, the common electrode is located on a surface of the insulation layer away from the pixel electrode; wherein the color filter substrate includes a first surface facing the array substrate, and providing with multiple touch receiving electrodes corresponding to the data lines.

Abstract: The invention provides a vapor deposition apparatus, comprising: a heating source, a crucible lid, a first crucible, a second crucible, a moving part, and a bracket. The first and second crucibles and moving part are disposed under the crucible lid; the first crucible is fixed on the bracket; and the first crucible and the second crucible each comprises an inner sidewall, an outer sidewall and a bottom. The crucible lid is mounted on the outer sidewall of the first crucible, the second crucible is fixed to top surface of the moving part; projection of the inner sidewall of the first crucible in vertical direction is located outside the outer sidewall of the second crucible. The density of the heating wire in the first region corresponding to the position of the crucible lid and the first crucible is greater than the density of the second region below the first region.

Abstract: A manufacturing method of a TFT array substrate is provided, comprising: depositing and forming a gate and a gate scanning line; depositing sequentially a gate insulating layer, an active layer and a second metal layer; depositing and forming a first photoresist layer and a second photoresist layer on the second metal layer; first photoresist layer comprising a first-stage photoresist layer, second-stage photoresist layer and third-stage photoresist layer with increasing thickness, the first-stage photoresist layer being in the middle of the first photoresist layer and a channel being formed; ashing to remove first-stage photoresist layer, forming a source and a drain by etching; and ashing to remove the second-stage photoresist layer, and then depositing a passivation layer as a whole; stripping third-stage photoresist layer and second photoresist layer, depositing and forming a pixel electrode and a common electrode.

Abstract: A manufacturing method of TFT substrate and a TFT substrate are provided. The method provides a dual-gate structure symmetrically disposed on both sides of active layer, which prevents TFT threshold voltage from changing and improve TFT conduction state switching; by first manufacturing the active layer before the gate insulating layer to make the insulating layer directly grow on active layer, the contact interface between the gate insulating layer and active layer is improved, leading to further improving TFT conduction state switching. The TFT substrate makes the gate located between the source and the pixel electrode in vertical direction, and the dual-gate is symmetrically disposed on both sides of active layer to prevent TFT threshold voltage from changing and improve TFT conduction state switching, as well as improve the contact interface between the gate insulating layer and active layer, leading to further improving TFT conduction state switching.

Abstract: An image edge processing method is disclosed. The method includes steps of: extracting a brightness component from an input image; calculating an edge probability value mp of each pixel in the image according to the extracted brightness component; calculating an enhancement coefficient A for each pixel based on the edge probability value mp; performing a noise detection according to the brightness component, and determining if each pixel in the image is a noise point; when the pixel is not a noise point, performing a logarithmic processing to the pixel in order to obtain a data w; enhancing an edge of the image according to the ?, the w and the brightness component in order to obtain an enhanced brightness component data; and after performing a brightness component synthesis according to the enhanced brightness component data, outputting an enhanced image. An electronic device and computer readable storage medium are also disclosed.