Abstract: The invention provides a flexible display panel and a flexible display device. The flexible display panel includes: a substrate, an auxiliary cathode provided on the substrate, an separation layer disposed on the substrate and the auxiliary cathode and defining a first opening to expose the auxiliary cathode, a passivation layer disposed on the separation layer and extending into the first opening as an undercut structure, an auxiliary anode arranged in the first opening and connected to the auxiliary cathode, and a cathode layer arranged on the auxiliary anode with a left end and a right end respectively connected with the auxiliary anode.

Abstract: An OLED display device and a manufacturing method thereof are provided. The OLED display device includes a base substrate, a plurality of OLED devices, and a plurality of spacers. A plurality of OLED devices are disposed on the base substrate. At least part of the OLED devices are provided with an inorganic layer on a side away from the base substrate. At least part of the spacers are distributed at the gaps between the OLED devices. The OLED display device can prevent a problem of degradation of display quality due to external impact.

Abstract: Disclosed are a pixel compensation circuit, a drive method thereof, and a display panel. The pixel compensation circuit includes a drive transistor, a data write module, a first initialization module, a second initialization module, a storage capacitor, and a light-emitting device. The drive timing of the pixel compensation circuit includes a threshold voltage compensation stage in which a detected threshold voltage of the drive transistor is less than an actual threshold voltage of the drive transistor.

Abstract: The present disclosure discloses a pixel circuit and a display panel. The pixel circuit includes a driving transistor, a storage capacitor, a first transistor, and a second transistor. By configuring the first transistor as a dual-gate dual-channel type thin film transistor, so that when a source of the driving transistor is compensated through the first transistor and the storage capacitor by a data signal, a source potential of the driving transistor may be quickly increased to a preset potential in a short time.

Abstract: The present application provides a pixel compensation circuit, a method of compensating pixel, and a display panel. The pixel compensation circuit includes a compensation transistor, a driving transistor, a reset transistor, a first switching transistor, a second switching transistor, a first capacitor, a second capacitor, and a light-emitting device. Compared with the pixel compensation circuit in prior art, the present application does not need to adopt a plurality of array substrate gate driving circuit to achieve compensation function. That is, the scanning signal lines adopted by the present application are less, which is convenient to achieve narrow bezel of display products.

Abstract: Display panels, methods of manufacturing a display panel, and display devices are provided. The display panel includes a substrate and a thin film transistor layer disposed on the substrate. The thin film transistor layer includes a gate, a gate insulating layer and an active layer; the gate is disposed on the substrate; the gate insulating layer is disposed on the substrate and covers the gate; and the active layer is disposed on a side of the gate insulating layer away from the gate. The gate insulating layer includes an electron suppressing layer at least covering a side of the gate away from the substrate and an electron blocking layer disposed on a side of the electron suppressing layer away from the gate, and a ratio of nitrogen to silicon in the electron suppressing layer is greater than 0.95.

Abstract: A gate driving circuit includes gate driving units. Each of the gate driving units includes a node voltage control module and a pull-down module. The node voltage control module includes a first module and a storage module. The first module outputs a first voltage signal at a first node in response to a pull-down control signal at a first control port. The storage module includes a first port receiving the first voltage signal, and a second terminal electrically connected to the first node. The pull-down module outputs a first working signal for controlling a plurality of sub-pixels to turn off at an output port of the gate driving unit in response to the first voltage signal. The storage module maintains the first voltage signal applied on the first node to maintain the first working signal at the output port of the gate driving unit controlled by the pull-down module.

Abstract: A separating device and a method of separation are disclosed. The separating device and the method of separation are for separating a flexible substrate fixed on a carrier substrate having a first divided area and a second divided area, the flexible substrate includes an effective area defined corresponding to the first divided area and an ineffective area defined corresponding to the second divided area. The separating device comprises: a movable platen, for raising the second divided area, thereby partially separating the carrier substrate from the flexible substrate, and thereby forming a slit; a separating sheet, for separating the flexible substrate along the slit, thereby separating the effective area of the flexible substrate from the first divided area of the carrier substrate; and a suction head, for removing the separated flexible substrate from the carrier substrate.

Abstract: A photosensitive device and a display panel are provided. The photosensitive device includes a substrate and a photosensitive functional layer. The photosensitive functional layer includes a thin film transistor layer and a quantum dot layer. The quantum dot layer is configured to emit an excitation light under an excitation of an external light. A photo-generated current efficiency of the photosensitive device can be improved, and stability and versatility of the photosensitive device can also be improved.

Abstract: A display panel, a method of manufacturing a display panel, and a display terminal are provided. Each of the light-emitting device includes a first electrode and a second electrode; the auxiliary wiring comprises a composite metal layer structure, side opening of the auxiliary wiring form an undercut structure, and the second electrode extends into the groove and electrically connects with the auxiliary wire by contacting a portion of metal layers in the undercut. The implementation of the present application can achieve electrical connection between the second electrode of the light-emitting device and the auxiliary wiring without additional manufacturing processes or photomasks.

Abstract: A display panel and a manufacturing method are provided. The present disclosure can reduce process steps of the display panel by disposing a first source electrode and a first drain electrode of a low temperature polysilicon thin film transistor and a second source electrode and a second drain electrode of an oxide thin film transistor in a same layer. Therefore, stability of the oxide thin film transistor can be improved, a channel length of the oxide thin film transistor can be shortened correspondingly, resolution of the display panel can be improved, and a thickness of the display panel can be reduced.

Abstract: The present application provides a display panel and a manufacturing method thereof. The display panel includes a substrate, a light emitting a device layer, and a viewing angle adjustment film. The light emitting device layer comprises a first viewing angle curve, a film thickness of the light emitting device layer is a film thickness corresponding to a light emission efficiency maximum value point of the first viewing angle curve. The viewing angle adjustment film is configured to adjust the light emission efficiency maximum value point from a side viewing angle to a main viewing angle and obtain a second viewing angle curve to obtain a large viewing angle under a prerequisite without lowering a front viewing angle light emission brightness.

Abstract: An embodiment of the present application discloses an array substrate and a display panel. In the array substrate, second line segment includes a connection portion and a wiring portion. The second signal line includes a third line segment. The third line segment and second line segment are in the same layer and are disposed adjacently on a first insulation layer. The third line segment is connected to a gate driver circuit unit, connection portion is connected to a first line segment. The wiring portion is connected to the connection portion and the gate driver circuit unit. A second insulation layer covers the first insulation layer, the third line segment, and the second line segment. A barrier wall is disposed on a side of the second insulation layer away from the substrate. A boundary of the barrier wall covers one of the connection portion and the third line segment.

Abstract: A gate driving circuit includes a gate driving unit arranged in a multi-stage cascade. The gate driving unit includes a pull-up control module, a pull-up node, a first output module, a second output module, a pull-down control module, a first pull-down module, a pull-down node, a second pull-down module, and a pull-down maintenance module. The pull-up control module is configured to pull up a potential of the pull-up node under a control of a first clock signal input at a first clock signal input terminal. The pull-down control module is configured to pull up a potential of the pull-down node under a control of the first clock signal. The first pull-down module is configured to pull the potential of the pull-down node down to a potential of the first clock signal under a control of the potential of the pull-up node.

Abstract: A display panel includes a plurality of data lines, a plurality of first sub-pixels and at least one second sub-pixel connected to the same data line. The at least one second sub-pixels are disposed between the plurality of the first sub-pixels, and compensation method of the display panel includes controlling each of the first sub-pixels to load a corresponding one of first data voltages in a first period, wherein a plurality of the first data voltages are in a first voltage interval and controlling each of the at least one second sub-pixel to load a corresponding one of second data voltages in a second period, wherein the plurality of second data voltages are in a second voltage interval, the second period does not overlap with the first period, and the second voltage interval does not overlap with the first voltage interval.

Abstract: The embodiments of the present application provide a method for manufacturing thin-film transistor (TFT) substrate and a TFT substrate thereof. A semi-finished substrate has a first region, a second region, and a third region. The semiconductor layer and the insulating layer of the semi-finished substrate are patterned under the shielding of the first etching barrier layer and the second etching barrier layer having different thickness, so that only the semiconductor layer in the second region is kept and causing the thickness of the insulating layer in the first region is greater than the thickness of the insulating layer in the third region.

Abstract: The present disclosure provides a method for determining a pixel voltage, an electronic device, and a storage medium. The method includes: obtaining an initial color shift ratio of a sub pixel to be tested, obtaining an initial evaluation value of a preset grayscale value, and obtaining a current evaluation value of the preset grayscale value according to a current color shift ratio; comparing the initial evaluation value with the current evaluation value; and determining a standard sub pixel voltage of the sub pixel to be test according to the current color shift ratio, when the current evaluation value is greater than the initial evaluation value.

Abstract: Compensation methods and brightness compensation devices for a display panel are provided.

Abstract: A display panel is provided. The display panel includes an array substrate, a first electrode layer and a pixel definition layer. The first electrode layer includes a pixel electrode layer and an auxiliary electrode layer. The pixel definition layer includes a first opening and a second opening. The first opening is disposed in correspondence with the pixel electrode layer, and the second opening is disposed in correspondence with the auxiliary electrode layer. A side surface of the pixel electrode layer away from the array substrate is lower than a side surface of the auxiliary electrode layer away from the array substrate.

Abstract: A gate driving circuit includes a gate driving unit arranged in a multi-stage cascade. The gate driving unit includes a pull-up control module, a pull-up node, a first output module, a second output module, a pull-down control module, a first pull-down module, a pull-down node, a second pull-down module, and a pull-down maintenance module. The pull-up control module is configured to pull up a potential of the pull-up node under a control of a first clock signal input at a first clock signal input terminal. The pull-down control module is configured to pull up a potential of the pull-down node under a control of the first clock signal. The first pull-down module is configured to pull the potential of the pull-down node down to a potential of the first clock signal under a control of the potential of the pull-up node.