Abstract: An array substrate is provided. The array substrate includes: a substrate; a LTPS TFT disposed above the substrate; a planarization layer covering the LTPS TFT; a via hole formed in the planarization layer, wherein the via hole reveals a drain electrode of the LTPS TFT; multiple common electrodes and receiving electrodes disposed separately on the planarization layer, wherein the multiple common electrode function as a driving electrode in a touch stage, and the multiple common electrodes which are disposed separately are connected with each other; a passivation layer which covers the multiple common electrodes and the multiple receiving electrodes and the planarization layer; and a pixel electrode disposed on the passivation layer, wherein, the pixel electrode is contacted with the drain electrode through the via hole. A manufacturing method for the array substrate is also provided. The present invention can reduce one manufacturing process and decrease production cost.

Abstract: The present invention provides a liquid crystal display device, which includes: a backlight module (20), a mold frame (40) mounted on the backlight module (20), a liquid crystal display panel (60) mounted in the mold frame (40), and a bezel (80) mounted on the liquid crystal display panel (60). The backlight module (20) includes a backplane (2), a light guide plate (4) arranged in the backplane (2), a backlight source (6) arranged in the backplane (2), and an optical film assembly (8) arranged on the light guide plate (4). The backlight source (6) includes a printed circuit board (62) and a plurality of LED lights (64) mounted to and electrically connected with the printed circuit board (62). The printed circuit board (62) includes a lateral section (622) and a bottom section (624) perpendicularly connected to the lateral section (622). The mold frame (40) includes an opening (42) formed therein to correspond to the backlight source (6).

Abstract: The present invention discloses an array substrate, which includes a thin-film transistor, a data line, a gate line, and a pixel electrode. The array substrate further includes a common electrode. The common electrode has a first region, a second region, and at least one opening. The first region is defined on the common electrode, and the first region is a projection of the pixel electrode on a plane where the common electrode is located. The second region is defined on the common electrode, and the second region is close to at least one edge of the first region. The at least one opening is defined on the second region of the common electrode.