Abstract: A thin-film transistor array panel and a manufacturing method thereof are disclosed. The thin-film transistor array panel has a polysilicon layer including a first region, a second region and a third region. The second region includes a fourth region, a fifth region and a sixth region. The third region includes a seventh region, an eighth region and ninth region. The sixth, the fourth, the ninth and the seventh regions are doped with first, second, third and fourth ions, respectively. In a thin-film transistor of the thin-film transistor array panel, a gate electrode, a source electrode and a drain electrode thereof correspond to the first, the sixth and the ninth regions, respectively. The device is able to reduce leakage current in the thin-film transistor.