Abstract: A data stream architecture-based accelerator includes a storage unit, a read-write address generation unit and a computing unit. The storage unit includes a plurality of banks. The read-write address generation unit is used for generating storage unit read-write addresses according to a preset read-write parallelism, determining target banks in the storage unit according to the storage unit read-write addresses and reading to-be-processed data from the target banks for operations in the computing unit. The computing unit includes a plurality of data paths and is configured to determine target data paths according to a preset computing parallelism so that the target data paths can perform operations on the to-be-processed data to obtain processed data, and then store the processed data into the target banks according to the storage unit read-write addresses.

Abstract: Provided are a scheduling method and apparatus based on a deep learning node computation, and a storage medium. The scheduling method includes: a to-be-computed node of a preset neural network computation graph is acquired; a node type of the to-be-computed node is determined, where the node type includes a hardware computation node and a software computation node; in a case where the node type is the hardware computation node, the hardware computation node is scheduled to a first queue, and whether a hardware computing power module corresponding to the hardware computation node is occupied or not is determined; and in a case where the hardware computing power module is not occupied, the hardware computation node is input into the hardware computing power module for computing.

Abstract: The present disclosure provides an artificial intelligence chip, an accelerator and an operation method, relating to the technical field of artificial intelligence, the chip comprising: a first operation circuit configured to execute a first operation to output a first operation result; a second operation circuit connected in parallel with the first operation circuit and configured to execute a second operation identical to the first operation to output a second operation result; and a third operation circuit configured to, upon receiving the first operation result and the second operation result, execute a third operation different from the first operation on the first operation result and the second operation result, respectively, to output a third operation result, respectively.

Abstract: The embodiments of the present application provide a data processing method and apparatus of an AI chip and a computer device. The data processing method of the AI chip includes: determining a target AI model for processing data to be processed; matching, in the AI chip, a data flow network corresponding to the target AI model and a data flow direction of the data flow network; and processing the data to be processed based on the data flow network and the data flow direction.

Abstract: A method for verifying correctness of model conversion under a deployment framework, and a computing device. The method for verifying correctness of model conversion under the deployment framework includes: acquiring, under a training framework, a trained model to be converted; acquiring a first intermediate result of the trained model to be converted, as contrast data; converting the trained model to be converted, into a deployment model; loading the deployment model under the deployment framework; executing the deployment model and acquiring a second intermediate result; and comparing the second intermediate results of the deployment model with the contrast data of the trained model, to locate a correctness-related problem of the deployment model before the deployment model completes execution. Accordingly, a problem node can be located quickly and accurately.

Abstract: A data flow-based neural network multi-engine synchronous calculation system, include: a plurality of calculation engines each including a plurality of calculation modules and at least one cache module located at different layers, and each calculation module is configured to calculate an input calculation graph provided by the cache module or the calculation module of a previous layer of a layer where each calculation module is located, so as to obtain an output calculation graph; and at least one synchronization module each being configured to monitor the data amount of the input calculation graph stored by the cache module on the same layer in each calculation engine, and control, when the data amount reaches a preset value corresponding to each cache module, each cache module on the same layer to output the stored input calculation graph to the calculation module on a next layer.

Abstract: Embodiments of the present disclosure provide an artificial intelligence (AI) chip and an AI chip-based data processing method. The AI chip includes: a data flow network for processing, on the basis of an AI algorithm, data to be processed. The data flow network includes: at least one calculation module, each configured to calculate, on the basis of one of at least one operation node corresponding to the AI algorithm, the data to be processed, and output a calculation result; and a next transfer module corresponding to each calculation module, connected to each calculation module, and configured to receive the calculation result output by each calculation module and process the calculation result, the data to be processed flowing in the data flow network according to a preset data flow direction.

Abstract: A data compression, decompression method, and an electronic device. The method includes the following steps: establishing an initial lookup table by using data with the same value in dataset to be compressed as one index, sequentially building a new Huffman tree corresponding to each index, and then adding a separator to obtain an encoding list containing a target encoding value and length, adding the encoding list to the initial lookup table to obtain a target lookup table. According to a separator of bitstream data, and searching the target lookup table in parallel, and use the indexes to obtain the decompression result of the data to be decompressed. Embodiments can perform a parallel decompression operation to increase a decompression speed, so that the decompression speed can meet the requirement of an AI engine for a large amount of weight data bandwidth in real time.

Abstract: A data compression, decompression method, and an electronic device. The method includes the following steps: establishing an initial lookup table by using data with the same value in dataset to be compressed as one index, sequentially building a new Huffman tree corresponding to each index, and then adding a separator to obtain an encoding list containing a target encoding value and length, adding the encoding list to the initial lookup table to obtain a target lookup table. According to a separator of bitstream data, and searching the target lookup table in parallel, and use the indexes to obtain the decompression result of the data to be decompressed. Embodiments can perform a parallel decompression operation to increase a decompression speed, so that the decompression speed can meet the requirement of an AI engine for a large amount of weight data bandwidth in real time.

Abstract: A data flow control device in a streaming architecture chip includes at least one first data buffer module, at least one operation module and at least one second data buffer module. The second data buffer module is configured to send a flow control count signal to the first data buffer module, the flow control count signal being used for informing the first data buffer module of an amount of data that can be received of the second data buffer module. The first data buffer module is configured to send a data signal and a valid signal to the second data buffer module via the operation modules according to the flow control count signal, the valid signal being used for indicating that a corresponding data signal is valid.

Abstract: A streaming-based compute unit and method, and an artificial intelligence chip, relating to artificial intelligence field. The compute unit includes N registers configured to perform N convolutions on N convolution windows and a convolution kernel. A jth convolution includes performing M multiplications on M data in a jth convolution window and M data in the convolution kernel, to obtain M first computation results. The N convolutions include N multiplications sequentially and consecutively performed on at least one set of feature map data and convolution kernel data. Each feature map data set includes N data from N convolution windows at the same position. A jth register is configured to store a second computation result of the jth convolution window. After an ith multiplication in the jth convolution, the second computation result is updated into a sum of i first computation results in the jth convolution.

Abstract: A data compression, decompression method, and an electronic device. The method includes the following steps: establishing an initial lookup table by using data with the same value in dataset to be compressed as one index, sequentially building a new Huffman tree corresponding to each index, and then adding a separator to obtain an encoding list containing a target encoding value and length, adding the encoding list to the initial lookup table to obtain a target lookup table. According to a separator of bitstream data, and searching the target lookup table in parallel, and use the indexes to obtain the decompression result of the data to be decompressed. Embodiments can perform a parallel decompression operation to increase a decompression speed, so that the decompression speed can meet the requirement of an AI engine for a large amount of weight data bandwidth in real time.

Abstract: A sparse data storage method for deep learning, a computer device and a storage medium. The method includes: obtaining an offset between current non-zero data and previous non-zero data of the current non-zero data, and generating to-be-transmitted data according to the current non-zero data and the offset, where the to-be-transmitted data is stored in a first memory; obtaining the to-be-transmitted data, calculating an address increment according to the offset, and obtaining, according to the address increment, a storage address in which the current non-zero data is to be stored in a second memory; and transmitting the current non-zero data to the second memory, and storing the current non-zero data in the storage address in the second memory. According to the embodiments, the power consumption and costs required by deep learning operations can be reduced.

Abstract: Disclosed are a method for implementing and developing a network model and a related product. The method includes: an establishment command of a neural network model is received, and a computation graph of an initial neural network model is established accordingly; a computing module selected and a connection relationship of the computing module are acquired, the computing module and the connection relationship are added into the computation graph of the initial neural network model, and an intermediate neural network model is obtained; and an establishment ending command of the neural network model is collected, the intermediate neural network model is verified according to the ending command to determine whether the computing module conflicts with other computing modules or not; if not, an established neural network model matched with a computation graph of the intermediate network model is generated, and execution codes matched with the computation graph are generated.

Abstract: Provided is a streaming-based artificial intelligence convolution processing method, applied to a processing module. The method includes: adding invalid data to a starting point of a first to-be-processed data matrix stored in a first streaming lake to form a second to-be-processed data matrix, where a number of columns of the second to-be-processed data matrix is an integral multiple of a degree of parallelism of data transmission; using a data transmission module to take out the second to-be-processed data matrix from the first streaming lake in a preset manner for a convolution operation. Also provided are a streaming-based artificial intelligence convolution processing apparatus, a readable storage medium and a terminal.

Abstract: A neural network model conversion method, a server, and a storage medium are provided according to embodiments of the present disclosure. The neural network model conversion method includes: parsing a neural network model to obtain initial model information; reconstructing the initial model information to obtain streaming model information; generating a target model information file according to the streaming model information; and running, under a streaming architecture, the neural network model according to the target model information file.

Abstract: Provided is a data processing system. The system includes a data source, a data receiver, a plurality of source code data frame buffer regions, a data processing module and a state register. The data source is configured to generate a data frame, the data receiver is configured to receive the data frame, and write the data frame into one of a plurality of data frame buffer regions, each of the plurality of source code data frame buffer regions is configured to store a data frame to be processed, the data processing module is configured to perform subsequent processing on data and the state register is configured to store a state of the system and states of the plurality of source code data frame buffer regions.

Abstract: Provided are a method and device for adjusting a deep learning network, a server and a storage medium. The method includes acquiring an initial data streaming computation graph that includes first operators for computing initial constant expressions; and obtaining a target data streaming computation graph according to parameters in the initial constant expressions. The target data streaming computation graph includes a second operator and is used for controlling a deep learning acceleration chip to perform data computation. The granularity of the second operator is larger than the granularity of a first operator to enable an adjustment of the amount of computation of the deep learning acceleration chip.

Abstract: A neural network model conversion method, a server, and a storage medium are provided according to embodiments of the present disclosure. The neural network model conversion method includes: parsing a neural network model to obtain initial model information; reconstructing the initial model information to obtain streaming model information; generating a target model information file according to the streaming model information; and running, under a streaming architecture, the neural network model according to the target model information file.

Abstract: Provided is a data processing system. The system includes a data source, a data receiver, a plurality of source code data frame buffer regions, a data processing module and a state register. The data source is configured to generate a data frame, the data receiver is configured to receive the data frame, and write the data frame into one of a plurality of data frame buffer regions, each of the plurality of source code data frame buffer regions is configured to store a data frame to be processed, the data processing module is configured to perform subsequent processing on data and the state register is configured to store a state of the system and states of the plurality of source code data frame buffer regions.