Abstract: Techniques are described for efficient staggered high-dynamic-range (HDR) output of an image captured using a high-pixel-count image sensor based on pixel binning followed by luminance-guided upsampling. For example, an image sensor array is configured according to a red-green-blue-luminance (RGBL) CFA pattern, such that at least 50-percent of the imaging pixels of the array are luminance (L) pixels. In each image capture time window, multiple (e.g., three) luminance-enhanced (LE) component images are generated. Each LE component image is generated by exposing the image sensor to incident illumination for a respective amount of time, using pixel binning during readout to generate appreciably downsampled color and luminance capture frames, generating an upsampled luminance guide frame from the luminance capture frame, and using the upsampled luminance guide frame to guide upsampling (e.g., and remosaicking) of the color capture frame.

Abstract: A capacitor includes at least one multi-wing structure; a laminated structure, where the laminated structure clads the at least one multi-wing structure and includes at least one dielectric layer and a plurality of conductive layers, and the at least one dielectric layer and the plurality of conductive layers form a structure that a conductive layer and a dielectric layer are adjacent to each other; at least one first external electrode, where the first external electrode is electrically connected to some conductive layer(s) in the plurality of conductive layers; at least one second external electrode, wherein the second external electrode is electrically connected to the other conductive layer(s) in the plurality of conductive layers, and a conductive layer in the laminated structure adjacent to each conductive layer in the some conductive layer(s) includes at least one conductive layer in the other conductive layer(s).

Abstract: Techniques are described for sampled bandgap reference generation for CMOS image sensor (CIS) applications. For example, the CIS includes a pixel array, one or more pixel analog to digital converters (ADCs), and a sampled bandgap reference generator, all integrated in close proximity on a chip. The ADCs rely on stable reference levels from the bandgap reference generator for performing pixel conversions for the pixel array. Embodiments of the sampled bandgap reference generator can operate according to reference generation cycles. Each cycle can include a first portion, in which an active core dynamically stabilizes the bandgap reference level; and a second portion, in which the core is deactivated, and the bandgap reference level is output based on a sampled level obtained during the preceding first portion of the cycle. The cycle timing can be controlled to achieve sufficient dynamic stabilization of the reference levels, while mitigating photon emissions from the core.

Abstract: A cache memory is disclosed. The cache memory includes an instruction memory portion, a tag memory portion, and one or more peripheral circuits configured to receive a CPU address corresponding with an address of the RAM memory storing a particular CPU instruction. The one or more peripheral circuits are configured to receive a way quantity indication indicating of a number of ways into which the instruction memory portion and the tag memory portion are to be subdivided, the one or more peripheral circuits are configured to identify which bits of the CPU address form the tag portion based on the way quantity indication, and the one or more peripheral circuits are configured to determine whether the particular CPU instruction is stored in the cache memory based on the identified tag portion of the CPU address and tag data stored in the cache memory.

Abstract: A method for fingerprint detection, which may more easily reduce an influence of a brightness change of a display screen on the fingerprint detection and improve performance of the fingerprint detection. The method for the fingerprint detection includes: receiving a synchronization signal of a display screen, the synchronization signal being configured to trigger a pixel array of a fingerprint sensor to expose, where a period of the synchronization signal is synchronized with a dimming period of the display screen, and the dimming period includes a bright period and a dark period; exposing each row of pixels in the pixel array in sequence based on triggering of the synchronization signal, so that a position of the pixel whose exposure time corresponding to the dark period in the pixel array is constant, where data of each row of the pixels after exposure is configured to obtain a fingerprint image.

Abstract: A method to protect code against altering includes reading immutable boot code from a ROM. A code image is loaded from an external memory and a hash is calculated by a core unit. The hash is initially authenticated using the boot code for decrypting the hash of the external memory. A salted hash for each equivalent of a cache line of the code image is concurrently calculated by a cache protection block and the salted hash for each cache line in an internal hash table is stored. If the authentication succeeds, a part of the code image is loaded into a secure cache of the embedded micro-processor.

Abstract: A security chip includes: a first medium layer; a second medium layer disposed on the first medium layer, where the first medium layer is an optically denser medium relative to the second medium layer, and a roughness of an upper surface of the first medium layer is greater than or equal to a preset threshold, so that light entering the second medium layer from the first medium layer is able to be totally reflected and/or scattered; and a semiconductor chip disposed on the second medium layer. Based on the above technical solution, light incident from a lower surface of the first medium layer is able to be totally reflected or scattered by the upper surface of the first medium layer, so that most of light cannot reach a logic or storage area on the front of the security chip, thereby achieving the purpose of resisting a laser attack.

Abstract: A capacitor includes: at least one multi-wing structure including N axes and M wings, where the N axes extend along a first direction, and the M wings are a convex structure formed by extending from side walls of the N axes toward a direction perpendicular to the first direction, a first wing of the M wings and the N axes are formed of a first conductive material, and other wings are formed of a second conductive material; a conductive structure cladding the multi-wing structure; a dielectric layer disposed between the multi-wing structure and the conductive structure to isolate the multi-wing structure from the conductive structure; a first external electrode electrically connected to some or all multi-wing structures; and a second external electrode electrically connected to the conductive structure.

Abstract: The present application discloses an asynchronous sampling architecture and a chip. The asynchronous sampling architecture is configured to receive a first input data string from the peer end, and the asynchronous sampling architecture includes: a first register, configured to buffer a first input data string, wherein the first input data string is written into the first register according to a peer end clock of the peer end; and a gated clock generation unit, configured to generate a gated clock, wherein the frequency of the gated clock is the same as the frequency of the peer end clock, and the first input data string is read out as a first output data string from the first register according to the gated clock.

Abstract: The present application provides a time-of-flight distance measuring system (10), including a delay unit (12) configured to generate a plurality of delayed pulses according to a plurality of delay signals, wherein the plurality of delay signals correspond to a plurality of delay times; a light-emitting unit (13), configured to generate a plurality of delayed pulsed lights according to the plurality of delayed pulses; a photosensitive pixel circuit (14), configured to receive a plurality of delayed reflected lights to generate a plurality of pixel signals; a storage unit (16), configured to store a correspondence between the plurality of delay times and the plurality of pixel signals; and a control unit (18), configured to generate the plurality of delay signals; wherein, the time-of-flight distance measuring system performs a time-of-flight distance measuring according to the correspondence between the plurality of delay times and the plurality of pixel signals.

Abstract: A method for identifying a fingerprint, a fingerprint identification apparatus and an electronic device are provided. The method includes: acquiring light signals in multiple directions reflected via a sampled object above a display screen; generating a plurality of two-dimensional 2D fingerprint images respectively based on the light signals; determining whether the sampled object is a three-dimensional 3D object based on the plurality of 2D fingerprint images; and if the sampled object is the 3D object, performing fingerprint identification based on at least one of the plurality of 2D fingerprint images. A distinction between a 2D object and a 3D object is effectively achieved through the light signals in the multiple directions, and when the sampled object is a 3D object, subsequent fingerprint identification is performed, which fundamentally avoids performing the fingerprint identification based on a fake fingerprint captured by a 2D object, thereby improving security of the fingerprint identification.

Abstract: Embodiments of the present application discloses an under-screen fingerprint identification apparatus, which includes: a micro-lens array, configured to be disposed under the backlight module of the liquid crystal display screen; at least one light shielding layer, disposed under the micro-lens array, wherein the light shielding layer is provided with a plurality of light transmission holes; a photo detecting array, disposed under the light shielding layer; wherein the micro-lens array is configured to converge an optical signal with a specific direction passing through the backlight module to a plurality of light transmission holes, and transmit an optical signal with a non-specific direction passing through the backlight module to a light shielding region of the light shielding layer, wherein the optical signal with the specific direction is transmitted to the photo detecting array through the plurality of light transmission holes.

Abstract: The present application discloses a transconductance amplifier and a related chip. The transconductance amplifier is configured to generate an output current according to a positive input voltage and a negative input voltage, wherein the transconductance amplifier includes: an input stage, configured to receive the positive input voltage and the negative input voltage and generate a positive output current and a negative output current, wherein the input stage includes: a first transistor, wherein a gate thereof is coupled to the positive input voltage; a second transistor, wherein a gate thereof is coupled to the negative input voltage; a first resistor, serially connected between the first transistor and the second transistor; a third transistor, wherein a source of the third transistor is coupled between the first resistor and the first transistor, and a drain of the third transistor is configured to output the positive output current; and a fourth transistor.

Abstract: An electronic system is disclosed. The system has a differential signal generator configured to generate first and second single ended signals having opposite polarities. The input signal, and the first and second single ended signals transition between a first power voltage and a first ground voltage. The system also has a glitch management circuit configured to generate an output signal based on the first and second single ended signals, where the output signal transitions between a second power voltage and a second ground voltage. The glitch management circuit includes a first latch configured to receive the first and second single ended signals, and to generate first and second intermediate signals. The first and second intermediate signals each transition between the second power voltage and the second ground voltage. The system also has a second latch configured generate the output signal based on the first and second intermediate signals.

Abstract: A capacitance detection apparatus and earphone. The capacitance detection apparatus includes a front housing and a rear housing, where the capacitance detection apparatus includes: a circuit board, a sensing electrode and a processing unit which are provided at the front housing, where the circuit board, the sensing electrode and the processing unit are integrated together; the sensing electrode is arranged in a first area of the circuit board, the processing unit is arranged in a second area of the circuit board, and the sensing electrode and the processing unit are electrically connected through a metal wiring layer in the circuit board; the sensing electrode is configured to sense a to-be-measured object and form a capacitance detection signal, the capacitance detection signal is transmitted to the processing unit through the metal wiring layer, and the processing unit is configured to process the capacitance detection signal to detect the to-be-measured object.

Abstract: The present application provides a capacitance detection module, a method and an electronic device, including: a sensing module and detecting circuit; a first sensing unit is disposed on the first surface of the sensing module, and a second sensing unit is disposed on the second surface of the sensing module; the first sensing unit and the second sensing unit are respectively connected to the detecting circuit; the detecting circuit is configured to determine, according to the capacitance value of the first sensing unit and the capacitance value of the second sensing unit, the wearing state of the user to the device having the capacitance detection module. Thereby the problem that the capacitance detection is affected by temperature is avoided.

Abstract: An image sensor including a pixel array which includes pixels for sensing a reflected signal, incident on the pixel array to form reflected light spots separated from each other. Each pixel includes a photodetector and a readout circuit. The photodetector is configured to detect the reflected signal and output a photo response signal. The readout circuit is configured to generate a pixel output according to the photo response signal. The pixels include a first pixel and a second pixel adjacent to the first pixel along a first predetermined direction. The readout circuit of the first pixel is adjacent to the photodetector of the second pixel along the first predetermined direction, and adjacent to the photodetector of the first pixel along a second predetermined direction perpendicular to the first predetermined direction. The pixel array has a small pixel pitch and a high fill factor.

Abstract: The present application discloses a signal processing circuit (100), coupled to a first transducer (102) and a second transducer (104), wherein there is a distance greater than zero between the first transducer and the second transducer, and a fluid having a flow velocity flows sequentially through the first transducer and the second transducer; the signal processing circuit includes: a first transmitter (106), coupled to the first transducer; a first receiver (108), coupled to the first transducer; a second transmitter (110), coupled to the second transducer; a second receiver (112), coupled to the second transducer; and a control unit (114), coupled to the first transmitter, the first receiver, the second transmitter and the second receiver. The present application further provides a related chip, a flow meter and a method.

Abstract: Provided are a topology switching method based on isochronous channel, an apparatus, a system and a storage medium. The method is applied to a first central slave device. There are a plurality of first isochronous channels between the first central slave device and a master device, and there is a first communication channel between the first central slave device and a peripheral slave device. The method includes: sending, by first central slave device, first isochronization information to peripheral slave device through the first communication channel, where the first isochronization information includes a channel parameter of first isochronous channel, so that peripheral slave device starts data transmission with master device according to the channel parameter of first isochronous channel; and stopping, by first central slave device, data transmission with master device through the first isochronous channel, before peripheral slave device starts data transmission with master device.

Abstract: A capacitance detection circuit, a touch control chip and an electronic device are provided, which could reduce the influence of a display screen noise on capacitance detection. The capacitance detection circuit includes: an amplification circuit, connected to a detection capacitance in a touch screen, and configured to amplify a capacitance signal of the detection capacitance and convert the capacitance signal into a voltage signal, the voltage signal configured to determine the detection capacitance; and a control circuit, connected to the amplification circuit, and configured to control a magnification of the amplification circuit, where a period in which a noise peak of a noise signal of a display screen is located includes consecutive N sub-periods, and a magnification of the amplification circuit in the N sub-periods is inversely proportional to a magnitude of the noise signal in the N sub-periods, N>1.