Patents Assigned to Shinko Electric Industries Co., Inc.
  • Patent number: 6441314
    Abstract: A substrate of multilayered structure having a plurality of sets of an insulation layer and a wiring line layer, and having one face for mounting a semiconductor element thereon and the other face on which external connection terminals are to be provided, the face for mounting a semiconductor element being provided with pads to be bonded to an electrode terminal of the semiconductor element, the other face being provided with pads to be bonded to an external connection terminal, such as a terminal formed of a solder ball, and the wiring line layers on both sides of an insulation layer being connected with each other by vias piercing the insulation layer, wherein the surfaces of the pads to be bonded to an electrode terminal of a semiconductor element are flat and are in the same plane. A method of manufacturing such a multilayered substrate is also disclosed.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: August 27, 2002
    Assignee: Shinko Electric Industries Co., Inc.
    Inventors: Akio Rokugawa, Masayuki Sasaki, Yuichi Matsuda
  • Patent number: 5994771
    Abstract: To provide a semiconductor package on which a multilayer circuit is formed by a so-called build-up system, capable of assuredly mounting a semiconductor chip and improving the reliability of a semiconductor device yield, and durability. The semiconductor package includes an insulating core substrate 10 on one surface of which is defined a semiconductor chip mounting area 20 for mounting the semiconductor chip 14. A circuit pattern 12 made of a metallic foil is also formed on this surface so that one end thereof extends into the semiconductor chip mounting area 20. Film-like circuit patterns 22 connected to the circuit pattern are formed in a multi-layered manner via a film-like insulating layer 18 around the semiconductor chip mounting area on the core substrate. By these film-like circuit patterns and the film-like insulating layer, the semiconductor chip mounting area 20 is defined as a recess.
    Type: Grant
    Filed: July 29, 1997
    Date of Patent: November 30, 1999
    Assignee: Shinko Electric Industries Co., Inc.
    Inventors: Masayuki Sasaki, Takayoshi Hanabusa
  • Patent number: 5313183
    Abstract: A gas-tube arrester includes an arrester body containing an inert gas and having first and second electrodes positioned in spaced, facing relationship to each other and separated by an insulator. An insulating, heat-resistant film is in contact with the first electrode and has an opening and a plurality of small holes. A metal plate layered on the insulating film has an opening communicating with the opening of the insulating film. A low-melting point metal plate layered on the metal plate to cover the openings has a melting point lower than a softening temperature of the insulating film.
    Type: Grant
    Filed: August 20, 1993
    Date of Patent: May 17, 1994
    Assignee: Shinko Electric Industries Co., Inc.
    Inventor: Masataka Kasahara
  • Patent number: 4545885
    Abstract: A selective electroplating apparatus including a masking member and a back-up plate for supporting a metal strip of lead frame therebetween. Electrolyte or electroplating liquid is sprayed through an aperture of the masking member onto a selective portion of the strip. Electric voltage is applied between an anode and the cathodically charged lead frame strip to form an electroplated layer on the selective portion of the strip. The masking member and the back-up plate are brought toward each other to support and contact the strip therebetween and away from each other to define a clearance therebetween, in each cycle of the electroplating process. Cleaning liquid is sprayed into the clearance defined between the masking member and the back-up plate during or after they are brought away from each other.
    Type: Grant
    Filed: August 14, 1984
    Date of Patent: October 8, 1985
    Assignee: Shinko Electric Industries Co., Inc.
    Inventors: Kuniyuki Hori, Kiyoshi Kitazawa