Patents Assigned to Shinon Denkisangyo Kabushiki-Kaisha
  • Patent number: 5970556
    Abstract: A dust remover for removing dirts or dusts comprises a cushioning material (1) made of a plurality of elastomeric filaments comprising a mixture of synthetic resinous material and a powdered electrical conductive material, said filaments are entangled each other to provide a plurality of through holes or voids extending vertically therethrough, a collector sheet (2) of electret laying under the cushioning material to provide a mat, a base (3) of insulating material for supporting the mat thereon, and a grounding cable (4) connected to the cushioning material.
    Type: Grant
    Filed: April 1, 1998
    Date of Patent: October 26, 1999
    Assignee: Shinon Denkisangyo Kabushiki-Kaisha
    Inventor: Hisashi Nemoto
  • Patent number: 5956798
    Abstract: A mat for removing dirts or dusts comprises a cushioning material made of a plurality of curled elastomeric filaments and a collector sheet of electret laying under the cushioning material. The filaments are formed of a compound of synthetic resinous material and a powdered electrical conductive material, and entangled with each other to provide a plurality of through holes or voids extending vertically through the cushioning material.
    Type: Grant
    Filed: April 3, 1997
    Date of Patent: September 28, 1999
    Assignee: Shinon Denkisangyo Kabushiki-Kaisha
    Inventors: Hisashi Nemoto, Kiyoyuki Takesako
  • Patent number: 5551572
    Abstract: A tray for housing semiconductor devices of a ball grid type, each having a surface provided with a plurality of wiring solder balls, the surface of each of the semiconductor devices having peripheral edges, and each of the wiring solder balls having a diameter, includes a tray surface, and pockets formed in the tray surface, each pocket having corners and a shape similar to and slightly larger than the surface of each semiconductor device. Each pocket has a bottom surface forming a depression and having a shape similar to and slightly smaller than the surface of each of the semiconductor devices and a depth larger than the diameter of each wiring solder ball. Each of ribs has a root formed on each corner of each pocket for dividing the pockets from each other and each having a width gradually increasing toward the bottom surface of each pocket.
    Type: Grant
    Filed: January 23, 1995
    Date of Patent: September 3, 1996
    Assignee: Shinon Denkisangyo Kabushiki-Kaisha
    Inventor: Hisashi Nemoto
  • Patent number: 5481438
    Abstract: Trays having the same size are piled up by fitting a downward extending edge frame formed on the whole periphery of the undersurface of each tray on the outer wall of the upward extending outer peripheral frame formed on the outer wall of the lower tray. The tray has multiple rectangular pockets defined by longitudinal and crosswise partition portions formed in a space defined by the inner wall of the outer peripheral frame. An upward projecting base is formed in the central portion of each pocket, for supporting the undersurface of a semiconductor device. Downward extending ribs are formed on the undersurface of each tray. Each rib surrounds upper side portions of the semiconductor device housed in the corresponding pocket of the lower tray and fitted on the inner wall of the inner wall of the lower tray. A first horizontal space D.sub.1 is defined between the outer peripheral frame and the edge frame, and a second horizontal space D.sub.
    Type: Grant
    Filed: September 6, 1994
    Date of Patent: January 2, 1996
    Assignee: Shinon Denkisangyo Kabushiki Kaisha
    Inventor: Hisashi Nemoto
  • Patent number: 5418692
    Abstract: A tray for semiconductor devices is used by piling up another tray or other trays on this tray. Rectangular pockets are formed on the upper surface of the trays and each of the pockets houses a semiconductor device. A base projects upward from each pocket to support each semiconductor device. The base has a similar shape to and is larger than the undersurface of the semiconductor device. Parallel guide ribs are formed on the undersurface of each tray and each is provided with an tapered inner face inclined downward outward of the base. The roots of the adjacent guide ribs define a portion of the undersurface of the trays which has a similar shape to and is smaller than the upper surface of the semiconductor device. The guide ribs are arranged to provide a horizontal play between the outer edge portions on the upper surface of the semiconductor device and the tapered inner face. An upwardly projecting holding mechanism extends along the outer edge portions.
    Type: Grant
    Filed: August 22, 1994
    Date of Patent: May 23, 1995
    Assignee: Shinon Denkisangyo Kabushiki-Kaisha
    Inventor: Hisashi Nemoto