Abstract: An optically triggered silicon controlled rectifier (SCR) circuit (20) has a number of semiconductor layers diffused into an N- substrate (21). The layers form an SCR (50) having a P+ anode region (25), a P+ gate region (24), and an N+ cathode region (27). An adjustable base-shunt resistance, in the form of a P- channel depletion mode MOSFET (Q3), connects between the SCR gate region and the cathode region. The MOSFET includes a MOSFET gate region (35), a P+ drain region (24), a P-- channel (26), and a P+ source region (23). The substrate also accommodates a PN photodiode (22, D1) which connects to the MOSFET gate region for switching the MOSFET on and off in response to incident optical radiation (L) thereon. The SCR gate region also comprises photosensitive material. When sufficient optical radiation illuminates the photodiode and the SCR gate region, the MOSFET is turned off and the SCR is triggered, permitting anode-to-cathode current to flow.

Abstract: An optically-coupled line receiver that handles multiple-state signals on data communications lines by using a differential circuit at the input.

Abstract: By using the linear behavior of optical emitters, one can provide an optically-coupled data communications line driver that directly interfaces with differential circuits. A single emitter provides multi-level signals avoiding the need for separate discrete devices.

Abstract: Optical feedback control in an optical emitter-detector combination can be improved by fabricating the two devices on a single substrate. The feedback radiation can then travel within a monolithic structure. This arrangement will yield greater uniformity in devices as well as provide for easier mechanical assembly.

Abstract: An optically triggered silicon controlled rectifier (SCR) circuit (20) has a number of semiconductor layers diffused into an N- substrate (21). The layers form an SCR (50) having a P+ anode region (25), a P+ gate region (24), and an N+ cathode region (27). An adjustable base-shunt resistance, in the form of a P- channel depletion mode MOSFET (Q3), connects between the SCR gate region and the cathode region. The MOSFET includes a MOSFET gate region (35), a P+ drain region (24), a P-- channel (26), and a P+ source region (23). The substrate also accommodates a PN photodiode (22, D1) which connects to the MOSFET gate region for switching the MOSFET on and off in response to incident optical radiation (L) thereon. The SCR gate region also comprises photosensitive material. When sufficient optical radiation illuminates the photodiode and the SCR gate region, the MOSFET is turned off and the SCR is triggered, permitting anode-to-cathode current to flow.

Abstract: An optically-triggered silicon controlled rectifier (SCR) (21) having a number of semiconductor layers (23, 24, 31) diffused into an N type substrate (22). Specifically, the SCR is formed by diffusing a first P+ layer (23) into an upper surface of the substrate. Then, an N+ layer (24) is diffused into a portion of an upper surface of the first P+ layer. An oxide layer (25) which is permeable to optical radiation is formed on the first P+ layer. A conductive cathode terminal (26) is then deposited on the N+ layer. Therefore, a trench (30) is etched in the lower surface of the substrate. The trench is defined by a depth and a surface. A second P+ layer (31) is diffused into the surface of the trench. The depth of the trench substantially defines a spacing between the first and second P+ layers. The chip is soldered onto a pedestal (33) formed on a lead frame (34). The solder is deposited in the trench and contacts the second P+ layer to form an anode terminal (36).

Abstract: A method of manufacturing a printed circuit board (PCB) for interconnecting integrated circuit devices includes a lead frame sandwiched between two multilayer substrates. Integrated circuit devices are mounted on the top of the upper substrate and on the bottom of the lower substrate to provide increased packaging density. Thus, according to the present invention, it is possible to provide a simply constructed electronic component mounting PCB which facilitates the design of circuits, and affords excellent connection reliability, which can readily form a heat radiating structure, and in which the thermal matching with the electronic component is excellent.

Abstract: An optically-triggered silicon controlled rectifier (SCR) device (21) mounted on a lead frame (34). The SCR device contains a cathode layer (24), an optical gate or control layer (23), and an anode layer (31) formed on a semiconductor substrate (22). The device is soldered onto a pedestal (33) formed on the lead frame. To connect the device to the lead frame, solder is deposited upon the anode layer and the solder fixes the anode layer to the pedestal on the lead frame. The pedestal may be formed by etching or stamping a depression (35) in the lead frame. The device is centered on the pedestal such that the edges of the device are located adjacent the depression, and are spaced from the lead frame.

Abstract: An improved printed circuit board (PCB) for interconnecting integrated circuit devices includes a lead frame sandwiched between two multilayer substrates. Integrated circuit devices are mounted on the top of the upper substrate and on the bottom of the lower substrate to provide increased packaging density. Thus, according to the present invention, it is possible to provide a simply constructed electronic component mounting PCB which facilitates the design of circuits, and affords excellent connection reliability, which can readily form a heat radiating structure, and in which the thermal matching with the electronic component is excellent.

Abstract: An integrated cascaded optical phase modulator for providing linearized complementary modulated light output signals consists of the successive cascade of a first phase modulator stage, first fixed optical coupler, second phase modulator stage, and second fixed optical coupler Rf modulating signals applied to each phase modulator stage are adjusted in amplitude, for compensating for errors in the coupling angles of the first and second optical couplers. The levels of DC bias voltages applied to each phase modulator stage are adjusted for compensating for asymmetric phase modulation.

Abstract: A process for generating a logic netlist suitable for a logic simulator model from a data or netlist representation (11) of a circuit of transistors and resistors in either emitter coupled logic or current mode logic technology. The logic netlist is formed to serve as a logic simulation model having logic elements structured and patterned to follow the circuit representation at the transistor level, most commonly known as a netlist, which includes the resistors and the overall circuit interconnection. The logic extraction process (1.0, 2.0) identifies active and passive circuit elements connected according to prescribed criteria to eliminate elements which do not contribute to logic functionality as well as identifying elements essential to providing the logic functionality. A systematic approach keeps track of circuit nodes to enable the appropriate interconnection of logic elements patterned after the physical circuit represented as the netlist.

Abstract: A circuit technique is presented for mixing current mode logic and emitter coupled logic in a manner which reduces active and passive component counts for performing recognized logic functions. The reduced counts permit greater circuit density while reducing power consumption in comparison to conventional emitter coupled logic circuitry. The mixing is also provided in a way for making all imputs and outputs compatible with conventional emitter coupled logic levels. Various logic circuits are illustrated to demonstrate the versatility of the technique. For example, a transparent high D-latch (FIG. 2), a D flip-flop with true output (FIG. 4), a two-to-one multiplex latch (FIG. 6), and other D flip-flops having set and reset inputs (FIG. 7), multiplex data inputs (FIG. 8), and Exclusive OR data inputs (FIG. 9) are circuits wherein the inventive technique is employed to advantage.