Abstract: A feed-back circuit for a high voltage generator including several voltage multiplying stages connected in series, wherein an oscillator generates two clock pulses being 180.degree. out of phase to one another, controlling alternately successive voltage multiplying stages to provide a high voltage pulse at the output of the high voltage generator, the high voltage output being connected to the feed-back circuit generating a control signal supplied to the oscillator, so that the two clock pulses are modified in dependence on the high voltage output voltage, wherein the feed-back circuit includes a high voltage feed-back circuit provided with a capacitive input stage (CP, CR), the output signal (VCTRLHV) of the high voltage feed-back circuit controlling the current of a controlled current source, and at least the oscillator generating the clock pulses receives the current as control signal and in dependence thereon controls the frequency of the clock pulses.

Abstract: A temperature compensated oscillator circuit includes an oscillator (1) which is controlled by a processor (8) . The output frequency (fx) of the oscillator (1) or an external reference frequency (fref) are used as reference signal in conjunction with a dual mode oscillator (9) which can be switched to provide temperature dependent fundamental (f1) and third (f3) harmonic frequencies. By the use of switches (S1, S2 S3), a divider (2) and first and second counters (3, 10) both calibration and temperature compensation of the oscillator (1) are carried out via the processor (8), using the substantially linear temperature dependence of the frequency difference between the third harmonic (f3) and three times the fundamental frequency (3f1).

Abstract: Offset-compensated sample and hold arrangement to sample an input signal comprising at least an operational amplifier (A), a first capacitor (C1), a second capacitor (C2), a first switch (S110), a second switch (S211), a third switch (S210), a fourth switch (S111), a fifth switch (S120), a sixth switch (S121), a seventh switch (S220) and an eighth switch (S221), which switches capacitors and operational amplifier are interconnected in such a way and may be switched in such a way that during an offset-compensation phase the output voltage will only experience a very small voltage change.

Abstract: AC voltage clipper for a MOS-circuit having two input terminals (In1, In2) receiving an ac supply voltage, wherein one input terminal (In1) is connected to a point of common voltage through a first MOS-transistor (MCL41) and the other input terminal (In2) is connected to said point of common voltage through a second MOS-transistor (MCL42). The gates of MOS-transistors (MCL41, MCL42) are connected to each other and receive a gate voltage (Vg4) of a control circuit (MCL2, MCL3, DCL11,DCL12), in such a way that both transistors (MCL41, MCL42) will conduct when the absolute value of the ac supply voltage, being applied as an input signal to the control circuit (MCL2, MCL3, DCL11, DCL12) exceeds a predetermined threshold value.

Abstract: Biasing circuit for a class-AB Miller CMOS operational amplifier generating a first biasing voltage (VB1) for a MOS transistor (M5) determining the current through an operational amplifier input stage (M1 . . . M5), as well as a second biasing voltage (VB1C) for a MOS-transistor (M8) determining the current in a source follower stage (M8, M9), among others comprising a series connection of a MOS transistor (MB1) connected as a diode and a current source (Iref), the junction point being connected to the inverting input of a biasing operational amplifier (A), the non-inverting input of which receives a signal from the junction point from a series connection of two MOS transistors (M8C, M9C) being proportional to the source follower stage (M8, M9). The output of the biasing operational amplifier (A) is connected to the gate electrode of MOS transistor (M8C).