Abstract: A flexible memory interface system includes a control module, instruction memory, a command processing unit, an address processing unit, and a data processing unit. The control module controls storing and retrieving of a command portion, an addressing portion, and data of an instruction to access memory to and from the instruction memory and the command processing unit, the address processing unit, and the data processing unit, respectively. The command processing unit is operably coupled to process a command portion of an instruction to access memory. The address processing unit is operably coupled to process an addressing portion of the instruction to access the memory. The data processing unit is operably coupled to process data conveyance to or from the external memory based on the instruction to access the memory.

Abstract: A system includes a decimation module having an adjustable decimation rate and a filter module responsive to the decimation module. A digital phase lock loop is operable to control a decimation rate of the decimation module. The decimation module is a cascade integrator comb decimation module.

Abstract: A method for managing power of a battery powered handheld audio device by receiving an indicia of signal quality for a received continuous-time radio signal. The method compares the indicia of signal quality to a signal threshold. Upon a favorable comparison, enacting a first analog signal conditioning setting. Upon an unfavorable comparison, enacting a second analog signal conditioning setting. The method further provides, upon the favorable comparison, disabling a digital filtering operation, and upon the unfavorable comparison, enabling the digital filtering operation.

Abstract: A buffer controller includes a first write pointer generation module for generating a first write pointer that points to a first sequence of write locations in a buffer memory, that directs an input module to store a sequence of samples of a real-time signal in a buffer memory. A read pointer generation module generates a plurality of read pointers for a corresponding plurality of output modules, wherein each of the plurality of read pointers points to a sequence of read locations in the buffer memory, in a buffer order, that contain the sequence of samples.

Abstract: An audio output circuit includes an on-chip left channel amplifier module, an on-chip center channel amplifier module, and an on-chip right channel amplifier module. A left channel IC pin is operably coupled to an output of the on-chip left channel amplifier module. A right channel IC pin is operably coupled to an output of the on-chip right channel amplifier module. A center channel IC pin is operably coupled to an output of the on-chip center channel amplifier module. A center channel feedback IC pin is operably coupled to an input of the on-chip center channel amplifier module to provide a feedback loop. A left jack connection is operably coupled to the left channel IC pin. A right jack connection is operably coupled to the right channel IC pin. A jack return connection coupled to the center feedback IC pin. An inductor has a first node coupled to the jack return connection and a second node coupled to the center channel IC pin.

Abstract: A gain control module includes an amplifier, a least significant bit (LSB) gain stage, and a most significant bit (MSB) gain stage. The amplifier includes a first input, a second input, and an output. The LSB gain stage produces a LSB gain based on an LSB portion of a gain control signal, wherein the LSB gain stage receives an input signal. The MSB gain stage produces an MSB gain based on an MSB portion of the gain control signal, wherein the MSB gain stage is coupled to the LSB gain stage, the first input of the amplifier, and the output of the amplifier, wherein the gain control module amplifies the input signal in accordance with the gain control signal.

Abstract: A method for managing power of a battery-powered handheld audio device by receiving an indicia of signal quality for a received continuous-time radio signal. The method compares the indicia of signal quality to a signal quality threshold. Upon a favorable comparison, enacting a first analog signal conditioning setting. Upon an unfavorable comparison, enacting a second analog signal conditioning setting. The method further provides, upon the favorable comparison, disabling a digital filtering operation, and upon the unfavorable comparison, enabling the digital filtering operation.

Abstract: A method includes receiving hardware update information during a first time period. The method further includes using the hardware update information to synchronize a first audio data stream with a device driver. The method further includes receiving hardware emulation information during a second time period and using the hardware emulation information to simulate synchronization between the device driver and the first audio data stream.

Abstract: A system includes a decimation module having an adjustable decimation rate and a filter module responsive to the decimation module. A digital phase lock loop is operable to control a decimation rate of the decimation module. The decimation module is a cascade integrator comb decimation module.

Abstract: The disclosure includes a system and method of using a processor and protected memory. In a particular embodiment, the system includes a processor, a volatile memory accessible to the processor, and a first nonvolatile memory accessible to the processor. The first nonvolatile memory includes a first portion of memory that is protected and is readable when a shield bit indicates an unshielded mode of operation, but is unreadable when the shield bit indicates a shielded mode of operation and a second portion of memory that is unprotected and that is readable regardless of the value of the shield bit. The system includes a second nonvolatile memory including data to be transferred to the volatile memory.

Abstract: A system includes a computer having a device driver. The device driver includes a detection module to detect an audio input. The device driver includes a selection module to send the audio input to audio hardware after detection of the audio input. The device driver also includes an emulation module to send hardware emulation information to an operating system audio application to replace feedback data received at the device driver from the audio hardware and sent from the device driver to the operating system audio application.

Abstract: A system includes a decimation module having an adjustable decimation rate and a filter module responsive to the decimation module. A digital phase lock loop is operable to control a decimation rate of the decimation module. The decimation module is a cascade integrator comb decimation module.

Abstract: A system and method for demodulating signals are disclosed. In a particular embodiment, the method includes receiving a signal at an input and determining a first noise estimate of the signal. The method also includes providing a first output indicating a second noise estimate of the signal at a primary carrier frequency and providing a second output indicating a third noise estimate of the signal at a secondary carrier frequency.

Abstract: Methods and systems for image processing are provided. A particular method includes receiving a video object plane (VOP) at an image processing device and decoding the received VOP. The method also includes storing an order number of the decoded VOP at a P-VOP queue in a memory of the image processing device when the received VOP is a predictive coded VOP (P-VOP). The method further includes storing the order number of the decoded VOP at a first available location of a display ordered read queue in the memory of the image processing device when the received VOP is not a P-VOP.

Abstract: A device includes a one-time-programmable memory including multiple random accessible input/output pins. Each random accessible I/O pin corresponds to a unique memory address in the one-time-programmable memory. The device also includes a multiplexing circuit with multiple inputs. Each of the multiple inputs is coupled to one of the multiple random accessible I/O pins. An output of the multiplexing circuit has a bit width that is less than the number of the multiple random accessible I/O pins.

Abstract: An integrated circuit includes a radio receiver for receiving a received radio signal having a plurality of channel signals, each of the plurality of channel signals being modulated at one of a corresponding plurality of carrier frequencies. The radio receiver converts a selected one of the plurality of channel signals into a demodulated signal. An interface clock generator generates a first interface clock at a first interface clock frequency that varies based on the selected one of the plurality of channel signals. The first interface clock frequency, and integer multiples of the first clock frequency are not substantially equal to the carrier frequency of the selected one of the plurality of channel signals. A driver module drives a device interface with a device based on the first interface clock.

Abstract: A system and method operable to automatically disable input/output signal processing based on the required data format is provided. The need for an input/output module, such as an encoder, required to process input signal having a first data format (i.e. multimedia format) and produce an output signal having a second format (i.e. multimedia format) is determined. When the input/output module is not required to produce the output signal in the second format, the input/output module is disabled.

Abstract: A touch screen driver that can be used with a resistive touch screen includes an input/output module that supplies at least one input signal to at least one of a plurality of input/output ports of the touch screen and that generates at least one output signal, in response to the at least one input signal, and in accordance with at least one control signal. A controller module generates the at least one control signal and that generates a position signal representing a resolved position in accordance with a plurality of contemporaneous touches of the resistive touch screen.

Abstract: A digital audio processing system includes an input to receive a phase component of a signal. The digital audio processing system includes symbol recognition logic to adjust a sample of the phase component using an offset value. The symbol recognition logic maps the adjusted sample to a nearest predetermined phase value of a plurality of predetermined phase values. The symbol recognition logic determines a symbol using a difference between the nearest predetermined phase value and a prior nearest predetermined phase value. The prior nearest predetermined phase value corresponds to a prior sample of the phase component of the signal. The offset value is based on a detected error of the prior sample of the phase component of the signal. The digital audio processing system also includes an output to provide a second signal that indicates the symbol.

Abstract: A method includes receiving payload data from a data source at error correction code (ECC) logic, where the ECC logic is adapted to process a block of data of a particular size via a plurality of stages. The ECC logic is initialized to a selected stage of the plurality of stages. The selected stage includes an initial value and an initial number of cycles. The initial value and the initial number of cycles are related to a number of symbols of padding data corresponding to a difference in size between the payload data and the block of data. The selected stage is related to a state of the ECC logic as if the number of symbols of padding data had already been processed by the ECC logic. The payload data is processed via the ECC logic beginning with the selected stage to produce parity data related to the payload data.