Abstract: A radar system for generating a fast frequency hopping output for frequency agility using a transmitter block and a receiver block. The transmitter block is configured to (i) modulate a digital signal using a first digital mixer, (ii) convert a modulated signal into an inphase analog signal and provide the inphase analog signal to at least one of a first RF IQ mixer or a third RF IQ mixer, (iii) convert the modulated signal into a quadrature analog signal provide the quadrature analog signal to at least one of the first RF IQ mixer or the third RF IQ mixer, and (iv) generate the fast frequency hopping output radar signal by mixing the inphase analog signal and the quadrature analog signal with an inphase RF local oscillator signal and a quadrature RF local oscillator signal.

Abstract: Disclosed herein is a system and a method for estimating frequency offset of LTE using DMRS and CRC. The system includes one or more modules as follows. A digital filtering and FFT unit 106 performs FFT operation on a base band signal. An individual user data extraction unit 108 extracts user data individual. A frequency correction unit 110 processes the extracted user data if individual. A DEMAP into PUSCH and DMRS unit 112 splits a corrected frequency signal. An equalizer unit 114 performs channel equalization. The channel estimation unit 116 determines a channel estimation (H). A multiplexer unit 122 receives the estimated frequency. An equalized data processing and CRC calculating unit 124 receives and processed the equalized data. A CRC value checking unit 126 determines whether a calculated cyclic redundancy check (CRC) value is valid or invalid.

Abstract: A method and system for protecting low voltage devices driven by a high voltage circuit is disclosed. The method comprises monitoring an output voltage, from a high voltage block, to a low voltage block. The method further comprises comparing the output voltage with a range of voltages allowable for driving the low voltage block. The range of voltages may be pre-defined or dynamically determined. Furthermore, the method comprises operating a first set of switches and a second set of switches. The first set of switches are operated to feed voltage from the high voltage block to input of the low voltage block, and the second set of switches are operated to feed a plurality of reference voltages to the input of the low voltage block.

Abstract: A method of reducing an on-chip memory associated with storing frame buffer in WCDMA receiver includes obtaining, at a WCDMA front end receiver, an signal, transmitting, by an analog to digital convertor, input samples to a digital to digital sigma-delta converter, converting, by a sample rate convertor, a sampling rate associated with the input samples to a desired sampling rate for a rake receiver, quantizing, by the digital to digital sigma-delta converter, the input samples with a first number of bits to a converted data samples of a reduced number of bits, storing, at a memory unit, the converted data samples of the reduced number of bits, filtering the noise from the converted data samples to obtain a noise filtered converted data samples of the reduced number of bits, and decoding, at a WCDMA receiver processing unit, the noise filtered converted data samples over an entire radio frame.

Abstract: A method of reducing an on-chip memory associated with storing frame buffer in WCDMA receiver includes obtaining, at a WCDMA front end receiver, an signal, transmitting, by an analog to digital convertor, input samples to a digital to digital sigma-delta converter, converting, by a sample rate convertor, a sampling rate associated with the input samples to a desired sampling rate for a rake receiver, quantizing, by the digital to digital sigma-delta converter, the input samples with a first number of bits to a converted data samples of a reduced number of bits, storing, at a memory unit, the converted data samples of the reduced number of bits, filtering the noise from the converted data samples to obtain a noise filtered converted data samples of the reduced number of bits, and decoding, at a WCDMA receiver processing unit, the noise filtered converted data samples over an entire radio frame.