Patents Assigned to Signetics KP Co., Ltd.
  • Publication number: 20020050407
    Abstract: A package for a semiconductor chip is provided. The package includes a ground conducting layer. A one metal layer interconnect substrate is attached to the ground conducting layer. The one metal layer interconnect substrate includes a via hole defining a path to the ground conducting layer. A conductive material substantially filling the path defined by the via hole is provided. The conductive material is in contact with the ground conducting layer.
    Type: Application
    Filed: December 7, 2001
    Publication date: May 2, 2002
    Applicant: SIGNETICS KP CO., LTD.
    Inventors: Ju Yung Sohn, Seung Ryul Ryu
  • Patent number: 6020637
    Abstract: Disclosed is a semiconductor package arrangement. The package arrangement includes a heat spreader for dissipating heat generated within the semiconductor package arrangement. The package further includes a ground plane having a first side that is attached to the heat spreader with an electrically insulating adhesive. The ground plane has a first aperture defining a path to a surface of the heat spreader that is configured to receive a semiconductor die. An interconnect substrate is adhesively attached to the ground plane, and the interconnect substrate has a complementary second aperture over the first aperture of the ground plane. Preferably, the interconnect substrate has a plurality of metal patterns for electrically interconnecting the semiconductor die to electrical connections that are external to the semiconductor package arrangement.
    Type: Grant
    Filed: July 14, 1997
    Date of Patent: February 1, 2000
    Assignee: Signetics KP Co., Ltd.
    Inventor: Marcos Karnezos