Abstract: An electronic package is provided, which includes: a substrate; at least an electronic element disposed on the substrate; an antenna structure disposed on the substrate; and an encapsulant formed on the substrate for encapsulating the electronic element and the antenna structure. Therein, the antenna structure has an extension portion and a plurality of support portions connected to the extension portion for supporting the extension portion over the substrate so as to save the surface area of the substrate, thereby meeting the miniaturization requirement of the electronic package.

Abstract: A semiconductor package and a fabrication method thereof are disclosed. The fabrication method includes the steps of providing a semiconductor chip having an active surface and a non-active surface opposing to the active surface, roughening a peripheral portion of the non-active surface so as to divide the non-active surface into the peripheral portion formed with a roughened structure and a non-roughened central portion, mounting the semiconductor chip on a chip carrier via a plurality of solder bumps formed on the active surface, forming an encapsulant on the chip carrier to encapsulate the semiconductor chip. The roughened structure formed on the peripheral portion of the non-active surface of the semiconductor chip can reinforce the bonding between the semiconductor chip and the encapsulant, and the non-roughened central portion of the non-active surface of the semiconductor chip can maintain the structural strength of the semiconductor chip.

Abstract: A semiconductor package without substrate and method of manufacturing the same includes providing an interim substrate which has a front surface covered with a solder mask at selected locations. The front surface not covered by the solder mask are formed with a plurality of lead layers and die pad layers. The top side of the die pad layer adheres to a chip. The chip and lead layers are connected electrically by a plurality of bonding wires. The chip, bonding wires, solder mask, lead layer and die pad layer are covered by a molded resin. After the package is singulated, the interim substrate is removed by etching to form the semiconductor package without substrate.