Patents Assigned to Silicon Bandwidth Inc.
  • Patent number: 7135768
    Abstract: Ultrasonically formed seals, their use in semiconductor packages, and methods of fabricating semiconductor packages. A brittle center member (such as glass) has a molded edge member. That edge member is ultrasonically welded to a body. The molded edge member and body are comprised of ultrasonically weldable materials. A hermetically sealed semiconductor package includes a lid with a brittle center plate and a molded edge. The molded edge is ultrasonically welded to a body. Locating features that enable accurate positioning of the lid relative to the body, and energy directors can be included. Pins having a relieved portion and a protruding portion can also be hermetically sealed to the body. Such pins can have various lengths that enable stadium-type pin rows. The pins can be within channels, which can hold a sealant. The body can include a device that is electrically connected to the pins.
    Type: Grant
    Filed: September 6, 2001
    Date of Patent: November 14, 2006
    Assignee: Silicon Bandwidth Inc.
    Inventors: Stanford W. Crane, Jr., Myoung-Soo Jeon, Matthew E. Doty
  • Patent number: 7070340
    Abstract: Optoelectronic packaging assemblies for optically and electrically interfacing a protected electro-optical device or system to both an optical fiber and to external circuitry. Such assemblies are comprised of body components that are comprised of plastic that coated or plated with a conductive material. Electrical contact pins in the form of transmission lines are used to couple external electrical signals with the package. The optoelectronic packaging assemblies are dimensioned with small cavities and with steps, breaks, walls, and/or fins molded into the body components. The optoelectronic packaging assemblies further include an optical input receptacle for receiving an optical ferrule and an optical fiber. The optoelectronic packaging assembly provides for cooling, such as by heat sink fins and/or a thermal-electric-cooler. The transmission line pins and body components are dimensioned to mate with a standardized circuit board having transmission line traces.
    Type: Grant
    Filed: February 14, 2002
    Date of Patent: July 4, 2006
    Assignee: Silicon Bandwidth Inc.
    Inventors: Stanford W. Crane, Jr., Myoung-Soo Jeon, Joshua G. Nickel, Zsolt Horvath
  • Patent number: 6847115
    Abstract: A packaged semiconductor device that is fabricated with a plurality of conductive leads defined in a strip that beneficially includes a radio frequency shield box. The conductive contacts are located in a housing, beneficially by insert molding or by sandwiching between a bottom piece and a top piece. The housing can further include a cavity that receives a semiconductor device, and the radio frequency shield can receive another semiconductor device. Bonding conductors electrically connect at least one semiconductor device to another semiconductor device and/or to the conductive contacts. A conductive cover is disposed over the housing. The cavity beneficially includes a beveled wall and the conductive leads and the radio frequency shield are beneficially comprised of copper.
    Type: Grant
    Filed: September 6, 2001
    Date of Patent: January 25, 2005
    Assignee: Silicon Bandwidth Inc.
    Inventors: Stanford W. Crane, Jr., Myoung-Soo Jeon, Vicente D. Alcaria
  • Patent number: 6828511
    Abstract: A semiconductor die carrier includes a plurality of electrically insulative side walls; a plurality of electrically conductive leads extending from at least one of the side walls, each of the leads being individually manufactured without use of a lead frame; a semiconductor die positioned such that the electrically conductive leads are disposed at one or more locations around the periphery of the die; and structure for providing electrical connection between the semiconductor die and corresponding ones of the electrically conductive leads.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: December 7, 2004
    Assignee: Silicon Bandwidth Inc.
    Inventors: Stanford W. Crane, Jr., Maria M. Portuondo
  • Patent number: 6803650
    Abstract: A cluster grid array semiconductor die package and mating socket provide electrical connection between one or more semiconductor dies housed within the die package and substrate, such as a printed circuit board, on which the mating socket is mounted. The die package and the mating socket may be easily connected and disconnected. The die package may include power and ground planes built into and distributed within the housing of the die package.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: October 12, 2004
    Assignee: Silicon Bandwidth Inc.
    Inventors: Stanford W. Crane, Jr., Myoung-soo Jeon, Charley Takeshi Ogata, Ton-Yong Wang, Andreas C. Cangellaris, Jose Schutt-Aine
  • Patent number: 6709891
    Abstract: A semiconductor die carrier includes a housing that defines a cavity for holding one or more semiconductor dies, electrically conductive leads, and a cover plate having an aperture formed therethrough. The housing includes insulative side walls and a end plate joined to the side walls. The side walls and the end plate may be molded together as a one-piece unit. One or more of the side walls includes openings for receiving the leads so that an internal lead section extends within the cavity and an external lead section extends from the side walls external of the housing. The side walls may include a recess for receiving the cover plate. The aperture in the cover plate allows a semiconductor die held in the housing to be exposed to the environment.
    Type: Grant
    Filed: August 30, 2002
    Date of Patent: March 23, 2004
    Assignee: Silicon Bandwidth Inc.
    Inventors: Sanford W. Crane, Jr., Lakshminarasimha Krishnapura, Yun Li
  • Patent number: 6603193
    Abstract: A semiconductor package having a molded body and a plurality of conductive pins that extend from the bottom of the molded body. The semiconductor package further includes a RF shield around a protected cavity that holds a first integrated circuit. The molded body can further include an unprotected plastic cavity for holding a second integrated circuit. The conductive pins form bonding pads that are used to electrically interconnect the first and second semiconductor devices to the external environment. A cover, beneficially comprised of copper, is disposed over the molded body. The plastic cavity beneficially includes a beveled wall that improves the routing of electrical conductors between the first integrated circuit and the second integrated circuit.
    Type: Grant
    Filed: September 6, 2001
    Date of Patent: August 5, 2003
    Assignee: Silicon Bandwidth Inc.
    Inventors: Stanford W. Crane, Jr., Myoung-Soo Jeon, Vicente D. Alcaria
  • Patent number: 6421254
    Abstract: A multi-chip module includes a housing having insulative side walls and an end plate, conductive leads extending from the side walls, integrated circuit (IC) dies mounted to the end plate, and one or more interconnect dies mounted to the end plate. The end plate is made from a heat sink material, such as copper. Each interconnect die is positioned between a pair of the IC dies. Electrically conductive material connects the IC dies to the interconnect die, connects the IC dies to the conductive leads, and connects the interconnect dies to the conductive leads. The interconnect dies function to interconnect the IC dies and to interconnect the IC dies to the conductive leads. The interconnect die may be embodied by wiring layers formed on a silicon substrate.
    Type: Grant
    Filed: July 13, 2001
    Date of Patent: July 16, 2002
    Assignee: Silicon Bandwidth Inc.
    Inventors: Stanford W. Crane, Jr., Lakshminarasimha Krishnapura, Yun Li, Moises Behar, Dan Fuoco, Bill Ahearn
  • Publication number: 20020053455
    Abstract: A semiconductor die carrier includes a plurality of electrically insulative side walls; a plurality of electrically conductive leads extending from at least one of the side walls, each of the leads being individually manufactured without use of a lead frame; a semiconductor die positioned such that the electrically conductive leads are disposed at one or more locations around the periphery of the die; and structure for providing electrical connection between the semiconductor die and corresponding ones of the electrically conductive leads.
    Type: Application
    Filed: September 28, 2001
    Publication date: May 9, 2002
    Applicant: SILICON BANDWIDTH INC.
    Inventors: Stanford W. Crane, Maria M. Portuondo
  • Patent number: 6339191
    Abstract: A semiconductor die carrier includes a plurality of electrically insulative side walls; a plurality of electrically conductive leads extending from at least one of the side walls, each of the leads being individually manufactured without use of a lead frame; a semiconductor die positioned such that the electrically conductive leads are disposed at one or more locations around the periphery of the die; and structure for providing electrical connection between the semiconductor die and corresponding ones of the electrically conductive leads.
    Type: Grant
    Filed: March 11, 1994
    Date of Patent: January 15, 2002
    Assignee: Silicon Bandwidth Inc.
    Inventors: Stanford W. Crane, Jr., Maria M. Portuondo
  • Patent number: 6203347
    Abstract: An electrical connector includes a projection-type interconnect component and a receiving type interconnect component. The projection-type interconnect component includes an insulative buttress and a plurality of electrically conductive contacts. The contacts are spaced from each other around a circumference of the insulative buttress. The receiving-type interconnect component is adapted for receiving the projection-type interconnect component. The receiving-type interconnect component includes a plurality of flexible, electrically conductive contacts and a spacer movable relative to the flexible contacts. The spacer at least partially flexes the flexible contacts when the spacer is in a first position. The insulative buttress of the projection-type interconnect component displaces the spacer of the receiving-type interconnect component when the projection-type interconnect component is received by the receiving-type interconnect component.
    Type: Grant
    Filed: September 28, 1999
    Date of Patent: March 20, 2001
    Assignee: Silicon Bandwidth Inc.
    Inventor: Stanford W. Crane, Jr.