Patents Assigned to Silicon Bridge, Inc.
  • Phase locked loop circuit with self adjusted tuning hiep the pham
    Patent number: 6952124
    Abstract: A phase-locked loop (PLL) circuit includes a voltage-controlled oscillator (VCO) having a first input to receive a control voltage, one or more second inputs to receive one or more tuning range control signals, and an output to provide an oscillation output signal, a phase detector having inputs to receive the oscillation output signal and a reference signal, a charge pump having an input coupled to the output of the phase detector and having an output to generate the control voltage, a loop filter having an input to receive the control voltage and having a control terminal, and a controller having inputs to receive the control voltage, a high reference voltage, a low reference voltage, and one or more mode signals, and having a first output connected to the control terminal of the loop filter and second outputs to generate the tuning range signals.
    Type: Grant
    Filed: September 15, 2003
    Date of Patent: October 4, 2005
    Assignee: Silicon Bridge, Inc.
    Inventor: Hiep The Pham
  • Multi-function input/output driver
    Patent number: 6856178
    Abstract: A high-speed I/O driver includes circuitry that is configurable to meet single-ended and differential I/O signal standards. For one embodiment, the driver includes four input circuits that can be configured to implement two CMOS inverters to process single-ended signals or configured to implement a differential circuit to process differential signals.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: February 15, 2005
    Assignee: Silicon Bridge, Inc.
    Inventor: Sriram Narayan
  • Input buffer circuit having equal duty cycle
    Patent number: 6819143
    Abstract: An input buffer circuit includes a first differential circuit, a second differential circuit, a pull-up circuit, and a pull-down circuit. An input voltage and a reference voltage are provided to the first and second differential circuits. The first differential circuit detects rising edges of the input voltage and causes the pull-up circuit to quickly drive an output voltage to logic high. The second differential circuit detects falling edges of the input voltage and causes the pull-down circuit to quickly drive the output voltage to logic low.
    Type: Grant
    Filed: March 13, 2003
    Date of Patent: November 16, 2004
    Assignee: Silicon Bridge, Inc.
    Inventor: Tae-Song Chung
  • Multiple value self-calibrated termination resistors
    Patent number: 6812735
    Abstract: A termination resistor circuit includes a first and second passive resistive elements coupled in series between a common mode voltage and a signal node, and a plurality of active resistive elements coupled in parallel with the first passive resistive element. The active resistive elements may be selectively enabled by corresponding control signals to provide various numbers of parallel resistances across the first passive resistive element, thereby tuning the termination resistor circuit to a desired resistance value.
    Type: Grant
    Filed: March 26, 2003
    Date of Patent: November 2, 2004
    Assignee: Silicon Bridge, Inc.
    Inventor: Hiep The Pham