Abstract: A distributed, shared memory computer architecture that is organized into a set of functionally independent processing nodes operating in a global, shared address space. Each node has one or more local processors, local memory and includes a common communication interface for communicating with other modules within the system via a message protocol. The common communication interface provides a single high-speed communications center within each node to operatively couple the node to one or more external processing nodes, an external routing module, an input/output (I/O) module. The common communication interface that facilitates the ability to incrementally add and swap the nodes of the system without disrupting the overall computing resources of the system.

Abstract: Noise estimation for coupled interconnects in deep submicron integrated circuits. One aspect of the invention is a method for interconnect coupling noise estimation. Another aspect of the invention is a computer readable medium embodying computer program code. The computer program code is configured to cause a computer to perform steps for estimating the interconnect coupling noise. The interconnect coupling noise estimation (hereafter noise estimation) includes modeling a circuit. The circuit includes a pair of interconnects, each interconnect connecting a driver gate to a load gate, where signal activity at a first interconnect of the pair of interconnects is having an impact on a second interconnect of the pair of interconnects. The circuit modeling includes modeling the first and second interconnects, driver gates, and load gates. Driver gates are modeled using a voltage source driving a resistance. Load gates are modeled using a capacitance.

Abstract: A cache for AGP based computer systems is provided. The graphics cache is included as part of a memory bridge between a processor, a system memory and a graphics processor. A cache controller within the memory bridge detects requests by the processor to store graphics data in the system memory. The cache controller stores the data for these requests in the graphics cache and in the system memory. The cache controller searches the graphics cache each time it receives a request from the graphics controller. If the a cache hit occurs, the cache controller returns the data stored in the graphics cache. Otherwise the request is performed using the system memory. In this way the graphics cache reduces the traffic between the system memory and the memory bridge, overcoming an important performance bottleneck for many graphics systems.

Abstract: A method and apparatus for transferring commands to a graphics processor is provided. The method and apparatus are intended for use in a host computer system having a memory that is addressable by a host processor and a graphics processor. One or more queues of packet descriptors are maintained in the memory of the host computer system. Each packet descriptor includes a pointer to a region of memory known as a packet buffer. Each packet descriptor also includes a ready variable. To pass commands to the graphics processor, a graphics process selects a packet buffer. The packet buffer must have a ready variable that is set to the value false. After selection of the appropriate packet descriptor, the graphics process writes the desired commands into the packet descriptor associated with the selected packet descriptor. The graphics process then sets the ready variable included in the selected packet descriptor to true. The graphics processor traverses the queues of packet descriptors.

Abstract: A method and apparatus for multisample dithering is provided. For the method of the present invention, a graphics pipeline generates a series of b-bit color sample values for each pixel that is to be processed. Each color sample is defined to include one or more omitted values. The omitted values allow the color sample values to have a range that exceeds the range that would normally be associated with the b-bits of each color sample value. The extended range of the color sample values allows the color sample values to be summed to exactly reconstruct all color values. At the same time, the values in the color samples are close to exact values. This means that constructed color values are close to their correct values.

Abstract: A method and apparatus for transferring commands to a graphics processor is provided. The method and apparatus are intended for use in a host computer system having a memory that is addressable by a host processor and a graphics processor. One or more queues of packet descriptors are maintained in the memory of the host computer system. Each packet descriptor includes a pointer to a region of memory known as a packet buffer. Each packet descriptor also includes a ready variable. To pass commands to the graphics processor, a graphics process selects a packet buffer. The packet buffer must have a ready variable that is set to the value false. After selection of the appropriate packet descriptor, the graphics process writes the desired commands into the packet descriptor associated with the selected packet descriptor. The graphics process then sets the ready variable included in the selected packet descriptor to true. The graphics processor traverses the queues of packet descriptors.

Abstract: A method and apparatus for volumetric three-dimensional fog rendering is provided. To add fog effects to an image, a host processor computes the location of the eye-point relative to the image to be fogged. Using the eye-point location, the host processor generates a three-dimensional fog texture and a blending function. The three-dimensional fog texture and blending function are downloaded or otherwise passed by the host processor to the graphics processor. The graphics processor then renders the primitives that make up the image. When rendering is complete, the graphics processor applies the tree-dimensional fog texture in an additional rendering pass. The method may then be repeated, to create animated fog effects such as swirling or wind-driven fog.

Abstract: A method and apparatus for efficiently translating virtual to physical addresses is provided. An embodiment of the apparatus includes a TLB descriptor table that includes a series of TLB descriptors. Each TLB descriptor includes an offset that selects a TLB segment within a translation lookaside buffer (TLB). To perform a virtual to physical address translation, a processor sends a virtual address and a descriptor ID to the memory request unit. The descriptor ID is used to select the TLB segment that will be used to perform the virtual to physical address translation. Each TLB segment may have different physical and logical characteristics. In particular, each TLB segment may be associated with a different type of memory page. In this way the present invention, enables the simultaneous use of a range of page types and sizes in a single computer system.

Abstract: A method, system, and computer program product for performing register promotion, that optimizes placement of load and store operations of a computer program within a compiler. Based on the observation that the circumstances for promoting a memory location's value to register coincide with situations where the program exhibits partial redundancy between accesses to the memory location, the system is an approach to register promotion that models the optimization as two separate problems: (1) the partial redundancy elimination (PRE) of loads and (2) the PRE of stores. Both of these problems are solved through a sparse approach to PRE. The static single assignment PRE (SSAPRE) method for eliminating partial redundancy using a sparse SSA representation representations the foundation in eliminating redundancy among memory accesses, enabling the achievement of both computational and live range optimality in register promotion results.

Abstract: A system and method for merging all subsystems within a graphics system into a single control entity, referred to herein as a dependency graph. The term "dependency graph" refers to a set of dependency nodes and the information flowing between the dependency nodes. Seamless interaction is accomplished by defining a strongly typed, rigidly enforced interface to the set of dependency nodes. Any dependency node that wants to interact with another dependency node must do so through a connection. The only parts of a dependency node that another node can control must be specified by attributes. In order for connections between attributes to be valid they must use the same type of information. Lastly, dependency nodes may communicate with each other by sending or receiving messages.

Abstract: A system and computer-based method for performing real-time mirror reflection of objects in a scene using a computer graphics system having a stencil buffer. The scene includes a background and a plurality of mirrors, and the stencil buffer comprises bits with initial values. A first level reflection mask is generated in the stencil buffer for the plurality of mirrors in the scene. Using the first level reflection mask, second level mirror reflections are determined, followed by first level mirror reflections, for each mirror in the scene. The first and second level mirror reflections are then drawn. Finally, the un-mirrored portions of the scene are drawn.

Abstract: A system and method for deforming objects uses delta free-form deformations (DFFD). The DFFD computes a delta vector based on a conventional free-form deformation (FFD) and an original vertex. Multiple delta vectors can be computed and combined for each vertex. Because delta vectors are independent from each other, various operations such as rotations and translations in addition to multiple overlapping deformations are applied to the vertex with superior results over the conventional FFD.

Abstract: A system and method for merging all subsystems within a graphics system into a single control entity, referred to herein as a dependency graph. The term "dependency graph" refers to a set of dependency nodes and the information flowing between the dependency nodes. Seamless interaction is accomplished by defining a strongly typed, rigidly enforced interface to the set of dependency nodes. Any dependency node that wants to interact with another dependency node must do so through a connection. The only parts of a dependency node that another node can control must be specified by attributes. In order for connections between attributes to be valid they must use the same type of information. Lastly, dependency nodes may communicate with each other by sending or receiving messages.

Abstract: A system and method for transferring files from a sending user to a recipient, utilizes a drag-and-drop graphical user interface. To send a file to a recipient, the user drags and drops onto the recipient's icon an icon, or set of selected icons, representing the file(s) to be transmitted. Information pertaining to the file and the recipient is captured from the icons and used to establish a session between the sender and the recipient. The file is transferred to the recipient via the established session.

Abstract: A system and method for weighting one or more vertices in a region being deformed by free-form deformation techniques assigns a weight a vertex based on the position of that vertex within the deformation lattice. The assigned weight is used to alter the amount of displacement that the free-form deformation would otherwise have on the vertex by an amount proportional to the weight.

Abstract: A system and method that maps temporal control functions into a six degree of freedom pointing device. The six degree of freedom pointing device controls both transport and view modes within a time-based media editing system and allows a user to toggle between modes without losing visual contact with graphical objects appearing on a video screen.

Abstract: A system and computer-based method providing a dynamic information clipping service. An end-user creates a template of topics of interest via a graphical user interface and the template is transmitted to a central site for processing. At the central site, information relating to a particular base of knowledge is collected, parsed and indexed. The parsed and indexed information is stored in an information repository. The template is processed by parsing and collecting command-strings relating to the topics of interest found within the parsed template. The information repository is searched using the collected command-strings to generate query results, which are then sorted. A Hypertext Mark-up Language (HTML) page is created using the sorted query results. The page is then made available to the end-user for viewing, wherein the page represents a custom network-based newspaper.

Abstract: A system for abstracting the byte ordering of a computer firmware from the operating system by allowing a computer to automatically change endianness under full software control. The byte ordering can be switched completely transparent to the end user during system boot. The system is comprised of hardware and software to run either byte order stand alone software or operating systems on demand.