Patents Assigned to Silicon Graphics International
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Patent number: 8407424Abstract: A method and apparatus for maintaining data coherency in a computer system having a plurality of nodes forms a directory by grouping the nodes into a plurality of hierarchical groups of two or more levels. The method and apparatus also 1) set the directory to have data relating to a first set of groups within a first level, and 2) determine if a requesting node requesting data is a member of one of the first set of groups. The directory then is set to have data relating to a second group of nodes if the requesting node is determined not to be a member of the first set of groups within the first level. The second group of nodes is in a higher level than the first level.Type: GrantFiled: November 7, 2005Date of Patent: March 26, 2013Assignee: Silicon Graphics International Corp.Inventors: Donglai Dai, Randal S. Passint
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Patent number: 8402225Abstract: In a computing system, cache coherency is performed by selecting one of a plurality of coherency protocols for a first memory transaction. Each of the plurality of coherency protocols has a unique set of cache states that may be applied to cached data for the first memory transaction. Cache coherency is performed on appropriate caches in the computing system by applying the set of cache states of the selected one of the plurality of coherency protocols.Type: GrantFiled: September 21, 2010Date of Patent: March 19, 2013Assignee: Silicon Graphics International Corp.Inventors: Steven C. Miller, Martin M. Deneroff, Kenneth C. Yeager
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Patent number: 8396908Abstract: A cluster of computer system nodes connected by a storage area network include two classes of nodes. The first class of nodes can act as clients or servers, while the other nodes can only be clients. The client-only nodes require much less functionality and can be more easily supported by different operating systems. To minimize the amount of data transmitted during normal operation, the server responsible for maintaining a cluster configuration database repeatedly multicasts the IP address, its incarnation number and the most recent database generation number. Each node stores this information and when a change is detected, each node can request an update of the data needed by that node. A client-only node uses the IP address of the server to connect to the server, to download the information from the cluster database required by the client-only node and to upload local disk connectivity information.Type: GrantFiled: November 10, 2009Date of Patent: March 12, 2013Assignee: Silicon Graphics International Corp.Inventors: Daniel Moore, Andrew Gildfind
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Patent number: 8327015Abstract: A system and method for conveying data include the capability to determine whether a transaction request credit has been received at a computer module, the transaction request credit indicating that at least a portion of a transaction request message may be sent. The system and method also include the capability to determine, if a transaction request message is to be sent, whether at least a portion of the transaction request message may be sent and to send the at least a portion of the transaction request message if it may be sent.Type: GrantFiled: January 18, 2011Date of Patent: December 4, 2012Assignee: Silicon Graphics International Corp.Inventors: Steven C. Miller, Thomas Edward McGee, Bruce Alan Strangfeld
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Patent number: 8321634Abstract: A processor may operate in one of a plurality of operating states. In a Normal operating state, the processor is not involved with a memory transaction. Upon receipt of a transaction instruction to access a memory location, the processor transitions to a Transaction operating state. In the Transaction operating state, the processor performs changes to a cache line and data associated with the memory location. While in the Transaction operating state, any changes to the data and the cache line is not visible to other processors in the computing system. These changes become visible upon the processor entering a Commit operating state in response to receipt of a commit instruction. After changes become visible, the processor returns to the Normal operating state. If an abort event occurs prior to receipt of the commit instruction, the processor transitions to an Abort operating state where any changes to the data and cache line are discarded.Type: GrantFiled: April 11, 2011Date of Patent: November 27, 2012Assignee: Silicon Graphics International Corp.Inventors: Steven C. Miller, Martin M. Deneroff, Curt F. Schimmel, Larry Rudolph, Charles E. Leiserson, Bradley C. Kuszmaul, Krste Asanovic
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Patent number: 8291009Abstract: A system and method for remote rendering of computer graphics wherein user transactions are reliable and the transmission of rendered graphics is relatively fast. The invention is implemented in a client server context, where a computer graphics application and rendering resources are located at a server. A user controls the graphics application through a client machine connected to the server through a computer network. The user's commands are sent from the client to the server, while rendered computer graphics are transmitted from the server to a display at the client. Different transport protocols are used, depending on the requirements of a particular transmission. Data related to user interactions is transmitted using a relatively reliable transport protocol, such as TCP. Rendered subject graphics data is transmitted from the server to the client using a less reliable but faster transport protocol, such as UDP.Type: GrantFiled: April 30, 2003Date of Patent: October 16, 2012Assignee: Silicon Graphics International Corp.Inventors: Alexander Chalfin, Alpana Kaulgud, Mark Peercy
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Patent number: 8239566Abstract: Processing transaction requests in a shared memory multi-processor computer network is described. A transaction request is received at a servicing agent from a requesting agent. The transaction request includes a request priority associated with a transaction urgency generated by the requesting agent. The servicing agent provides an assigned priority to the transaction request based on the request priority, and then compares the assigned priority to an existing service level at the servicing agent to determine whether to complete or reject the transaction request. A reply message from the servicing agent to the requesting agent is generated to indicate whether the transaction request was completed or rejected, and to provide reply fairness state data for rejected transaction requests.Type: GrantFiled: February 28, 2008Date of Patent: August 7, 2012Assignee: Silicon Graphics International, Corp.Inventors: Eric C. Fromm, Gregory M. Thorson
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Publication number: 20120191654Abstract: A computer system with read/write access to storage devices creates a snapshot of a data volume at a point in time while continuing to accept access requests to the mirrored data volume by copying before making changes to the base data volume. Multiple snapshots may be made of the same data volume at different points in time. Only data that is not stored in a previous snapshot volume or in the base data volume are stored in the most recent snapshot volume.Type: ApplicationFiled: April 9, 2012Publication date: July 26, 2012Applicant: SILICON GRAPHICS INTERNATIONALInventor: Kenneth Beck
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Publication number: 20120192270Abstract: A cluster of computer system nodes share direct read/write access to storage devices via a storage area network using a cluster filesystem. At least one trusted metadata server assigns a mandatory access control label as an extended attribute of each filesystem object regardless of whether required by a client node accessing the filesystem object. The mandatory access control label indicates the sensitivity and integrity of the filesystem object and is used by the trusted metadata server(s) to control access to the filesystem object by all client nodes.Type: ApplicationFiled: April 3, 2012Publication date: July 26, 2012Applicant: Silicon Graphics InternationalInventor: Kenneth S. Beck
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Patent number: 8185703Abstract: In an embodiment, a system includes a resource. The system also includes a first processor having a load/store functional unit. The load/store functional unit is to attempt to access the resource based on access requests. The first processor includes a congestion detection logic to detect congestion of access of the resource based on a consecutive number of negative acknowledgements received in response to the access requests prior to receipt of a positive acknowledgment in response to one of the access requests within a first time period.Type: GrantFiled: July 31, 2003Date of Patent: May 22, 2012Assignee: Silicon Graphics International Corp.Inventors: Gregory Marlan, Kenneth Yeager, Mahdi Seddighnezhad, David X. Zhang
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Patent number: 8156080Abstract: A computer system with read/write access to storage devices creates a snapshot of a data volume at a point in time while continuing to accept access requests to the mirrored data volume by copying before making changes to the base data volume. Multiple snapshots may be made of the same data volume at different points in time. Only data that is not stored in a previous snapshot volume or in the base data volume are stored in the most recent snapshot volume.Type: GrantFiled: October 12, 2010Date of Patent: April 10, 2012Assignee: Silicon Graphics InternationalInventor: Kenneth Beck
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Patent number: 8151347Abstract: A cluster of computer system nodes share direct read/write access to storage devices via a storage area network using a cluster filesystem. At least one trusted metadata server assigns a mandatory access control label as an extended attribute of each filesystem object regardless of whether required by a client node accessing the filesystem object. The mandatory access control label indicates the sensitivity and integrity of the filesystem object and is used by the trusted metadata server(s) to control access to the filesystem object by all client nodes.Type: GrantFiled: December 29, 2009Date of Patent: April 3, 2012Assignee: Silicon Graphics InternationalInventor: Kenneth S. Beck
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Patent number: 8010558Abstract: A cluster of computer system nodes share direct read/write access to storage devices via a storage area network using a cluster filesystem and operating system implementing DMAPI. Threads executing on a metadata client know when a DMAPI event is required, and generate the DMAPI event on their own initiative when necessary. A metadata server maintains DMAPI queues. If the metadata server relocates to another host, the DMAPI events in the DMAPI queues are moved transparently to users.Type: GrantFiled: July 17, 2003Date of Patent: August 30, 2011Assignee: Silicon Graphics InternationalInventors: Geoffrey Wehrman, Dean Roehrich
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Patent number: 8001222Abstract: A cluster of computer system nodes share direct read/write access to storage devices via a storage area network using a cluster filesystem. Version information about subsystems is acquired by a leader node when forming a cluster membership and distributed to all nodes in the cluster to enable proper messaging during operation.Type: GrantFiled: April 16, 2007Date of Patent: August 16, 2011Assignee: Silicon Graphics InternationalInventor: Kenneth Beck
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Publication number: 20110133620Abstract: A rack mounted computer system. In one variation the computer rack is configured for side-by-side placement of computers. In another variation, the computer rack includes flanges for supporting the placement of computer units within the rack. In another variation the computer rack is configured with retaining clips. In yet another variation, the computer rack is configured to receive computers with chassis that are adapted for side-by-side placement.Type: ApplicationFiled: February 15, 2011Publication date: June 9, 2011Applicant: SILICON GRAPHICS INTERNATIONAL CORP.Inventors: GIOVANNI COGLITORE, MATTHEW P. CASEBOLT
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Patent number: 7924570Abstract: A computer system comprising an interface assembly configured to support one or more I/O connections. In one variation, the computer system comprises a main board housed within a chassis, a chassis connector coupled to the chassis, and one or more I/O cables coupled to the chassis connector. In another variation, the computer assembly comprises a computer rack with a plurality of connector interfaces, each of which is adapted for engaging a computer through a chassis connector with a plurality of I/O ports.Type: GrantFiled: March 17, 2010Date of Patent: April 12, 2011Assignee: Silicon Graphics International CorpInventors: Jack E. Randall, Giovanni Coglitore
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Patent number: 7925839Abstract: A processor may operate in one of a plurality of operating states. In a Normal operating state, the processor is not involved with a memory transaction. Upon receipt of a transaction instruction to access a memory location, the processor transitions to a Transaction operating state. In the Transaction operating state, the processor performs changes to a cache line and data associated with the memory location. While in the Transaction operating state, any changes to the data and the cache line is not visible to other processors in the computing system. These changes become visible upon the processor entering a Commit operating state in response to receipt of a commit instruction. After changes become visible, the processor returns to the Normal operating state. If an abort event occurs prior to receipt of the commit instruction, the processor transitions to an Abort operating state where any changes to the data and cache line are discarded.Type: GrantFiled: July 7, 2008Date of Patent: April 12, 2011Assignee: Silicon Graphics InternationalInventors: Steven C. Miller, Martin M. Deneroff, Curt F. Schimmel, Larry Rudolph, Charles E. Leiserson, Bradley C. Kuszmaul, Krste Asanovic
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Patent number: 7911785Abstract: A rack mounted computer system. In one variation the computer rack is configured for side-by-side placement of computers. In another variation, the computer rack includes flanges for supporting the placement of computer units within the rack. In another variation the computer rack is configured with retaining clips. In yet another variation, the computer rack is configured to receive computers with chassis that are adapted for side-by-side placement.Type: GrantFiled: March 19, 2009Date of Patent: March 22, 2011Assignee: Silicon Graphics International Corp.Inventors: Giovanni Coglitore, Matthew P. Casebolt
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Patent number: 7908526Abstract: Methods for preventing the failure of disk drives in storage systems are disclosed. A system and a computer program product for preventing the failure are also disclosed. Factors relating to the aging or early onset of errors in a disk drive are monitored. These factors are then compared to thresholds. In case the thresholds are exceeded, an indication for the replacement of the disk drive is given. Sudden rises in the factors are also used to indicate the impeding failure of disk drives.Type: GrantFiled: April 8, 2008Date of Patent: March 15, 2011Assignee: Silicon Graphics InternationalInventor: Aloke Guha
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Patent number: 7881321Abstract: A multiprocessor computer system includes a first and second node controller, a number of processors being connected to each node controller, a memory connected to each node controller, a first input/output system connected to the first node controller, and a communications network connected between the node controllers. The first node controller includes: a crossbar unit to which are connected a memory port, an input/output port, a network port, and a plurality of independent processor ports. A first and a second processor port is connected between the crossbar unit and a first subset and a second subset, respectively, of the processors. The memory port includes a memory data port including a memory data bus and a memory address bus coupled to the first subset of memory chips, and a directory data port including a directory data bus and a directory address bus coupled to the second subset of memory chips.Type: GrantFiled: July 28, 2008Date of Patent: February 1, 2011Assignee: Silicon Graphics InternationalInventors: Martin M. Deneroff, Givargis G. Kaldani, Yuval Koren, David Edward McCracken, Swaminatham Venkataraman