Patents Assigned to Silicon Metrics Corporation
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Patent number: 6931634Abstract: Systems and methods are described for an encrypted compiler. A method includes generating a first sub-file of source code; then encrypting said first sub-file of source code; then writing said first sub-file of source code to a buffer; then reading a second sub-file of source code from said buffer; then decrypting said second sub-file of source code; and then compiling said second sub-file of source code.Type: GrantFiled: December 21, 2000Date of Patent: August 16, 2005Assignee: Silicon Metrics CorporationInventor: John F. Croix
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Patent number: 6862600Abstract: Systems and methods are described for rapid parameter passing. A method includes enumerating a set of parameters; providing an indication in a first set of arrays of whether to acquire from first program portion information associated with one or more parameters of the set of parameters, in response to a second program portion issuing a query t a third program portion for identifying the one or more parameters; populating a second et of arrays in an image of the first set of arrays with the information received from the first program portion associated with the one or more parameters, in response to a request from the second program portion; evaluating the third program portion by utilizing the information associated with the one or more parameters from the second set of arrays to derive an output from the third program portion for return to the second program portion; and conveying the output second program portion to the first program portion.Type: GrantFiled: May 22, 2001Date of Patent: March 1, 2005Assignee: Silicon Metrics CorporationInventors: John F. Croix, Robert Gonzalez
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Patent number: 6766506Abstract: Systems and methods are described for a circuit interconnect model compiler. A method includes providing extraction data from an interconnect; reading a dataset from said extraction data from said interconnect; reducing said dataset to form a model; evaluating said model for a set of conditions to obtain a solution; and writing said solution to an application. The systems and methods provide advantages in that the speed, reliability and accuracy of the design process are improved and the affect of circuit interconnects is taken into account.Type: GrantFiled: November 7, 2000Date of Patent: July 20, 2004Assignee: Silicon Metrics CorporationInventors: Curtis L. Ratzlaff, John F. Croix, Robert Jones
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Publication number: 20040049748Abstract: A system for characterizing a circuit includes a computer. The computer operates on a model of the circuit. The model has an input and output. The computer is configured to supply a stimulus to the input of the model of the circuit. The input stimulus has an input value. The computer is also configured to supply a stimulus to the output of the model. The output stimulus has an output value. The computer is further configured to sweep the input and output values through a first and second set of swept values, and to characterize an output current of the model of the circuit as a function of the first and second swept values.Type: ApplicationFiled: June 19, 2003Publication date: March 11, 2004Applicants: Silicon Metrics Corporation, SMC Technology, L.L.C., Nascentric, Inc.Inventor: John F. Croix
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Publication number: 20040049749Abstract: A system for characterizing an interconnect in an electrical circuit includes a computer. The computer calculates a set of terms, the set of terms derived from (i) a characteristic pole and a characteristic residue of the interconnect and (ii) a fixed time step used to describe a stimulus applied to the interconnect. The computer calculates a response of the interconnect to the stimulus by calculating a partial sum derived from the set of terms.Type: ApplicationFiled: June 19, 2003Publication date: March 11, 2004Applicants: Silicon Metrics Corporation, SMC Technology, L.L.C., Nascentric, Inc.Inventor: John F. Croix
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Publication number: 20030212964Abstract: A circuit-characterization system includes a computer. The computer uses a model of an operation of the circuit to characterize first and second constraints of the circuit and to select values for the first and second constraints, respectively. The computer modifies the values selected for the first and second constraints to obtain optimized values for the first and second constraints. The optimized values of the first and second constraints avoid an invalid region of operation of the circuit.Type: ApplicationFiled: June 19, 2003Publication date: November 13, 2003Applicant: Silicon Metrics CorporationInventors: Guruprasad G. Rao, E. Keith Howick
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Patent number: 6584598Abstract: A circuit-characterization system includes a computer. The computer uses a model of an operation of the circuit to characterize first and second constraints of the circuit and to select values for the first and second constraints, respectively. The computer modifies the values selected for the first and second constraints to obtain optimized values for the first and second constraints. The optimized values of the first and second constraints avoid an invalid region of operation of the circuit.Type: GrantFiled: July 13, 2001Date of Patent: June 24, 2003Assignee: Silicon Metrics CorporationInventors: Guruprasad G. Rao, E. Keith Howick, Jr.
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Publication number: 20020046015Abstract: According to a first model of an operation of circuitry, a first set of estimates of the operation is generated in response to a set of conditions, including a first estimate of the operation in response to a first condition. According to a second model of the operation, a second set of estimates of the operation is generated in response to the first condition and the first set. In response to a comparison between the first estimate and the second set, a subset of the first set is selected. According to the second model, an estimate of the operation is generated in response to a second condition and the selected subset.Type: ApplicationFiled: September 26, 2001Publication date: April 18, 2002Applicant: Silicon Metrics CorporationInventor: John Francis Croix
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Patent number: 6327557Abstract: According to a first model of an operation of circuitry, a first set of estimates of the operation is generated in response to a set of conditions, including a first estimate of the operation in response to a first condition. According to a second model of the operation, a second set of estimates of the operation is generated in response to the first condition and the first set. In response to a comparison between the first estimate and the second set, a subset of the first set is selected. According to the second model, an estimate of the operation is generated in response to a second condition and the selected subset.Type: GrantFiled: June 4, 1998Date of Patent: December 4, 2001Assignee: Silicon Metrics CorporationInventor: John Francis Croix