Abstract: A multi-channel display driver circuit incorporating modified D/A converters has a plurality of digital comparators connected to a number generator. Each digital comparator has an output, a digital data input and a reference input. The reference inputs of all digital comparators are connected to the number generator and the outputs are respectively connected to corresponding data channels of a display. By the proposed technique, each digital comparator obtains a unique non-sequence reference signal, and then compares it with the input digital data signal. Since the non-sequential signals are input to the reference input of the digital comparator, the overshoot distortion, the harmonic distortion and the electromagnetic interference problems are prevented. Therefore, the precise imaging can be obtained with this signal modulation technique in small circuit size.

Abstract: A motor speed control having synchronous PWM signals has a synchronous phase detecting unit and a PWM control unit. The synchronous phase detecting unit detects the phase variation of a Hall signal, which represents the phase change of the motor, and outputs a digital value to the PWM control unit. The PWM control unit compares the digital value with a speed control command so as to obtain a PWM signal, wherein the PWM signal is synchronized with the Hall signal. Since the PWM signal is synchronized with the Hall signal, the motor is operated smoothly even in the low speed rotation, and audible noises are effectively reduced.

Abstract: A power polarity reversal protecting circuit for an integrated circuit includes a protecting transistor, PMOS components and NMOS components, wherein the protecting transistor is a protecting PMOS transistor or a protecting NMOS transistor. If the protecting transistor is the PMOS transistor, a gate and a source of the protecting PMOS transistor are respectively connected to ground and power. A drain and a substrate of the protecting PMOS transistor is connected to a substrate of the PMOS component. If the protecting transistor is the protecting NMOS transistor, a gate and a source of the protecting NMOS transistor are respectively connected to power and ground. A drain and a substrate of the protecting NMOS transistor is connected to a substrate of the NMOS component. When the power polarity is in reversal connection, the protecting transistors are terminated to prevent damage from the power polarity reversal connection.

Abstract: A fan linear speed controller is disclosed, which controls the rotation speed of a fan by an external fan control voltage. The fan linear speed controller includes a temperature sensor unit, a linear speed control unit and a fault detection unit. The temperature sensor unit has a thermistor for detecting the ambient temperature of the fan to generate a thermally sensitive voltage. The linear speed control unit receives the external fan control voltage and the thermally sensitive voltage to generate an output voltage for driving the fan. The output voltage is proportional to the fan control voltage when the thermally sensitive voltage is lower than a preset threshold voltage and the fan control voltage is higher than a preset reference voltage. The fault detection unit receives the thermally sensitive voltage and a rotation speed signal generated by the fan to selectively produce a fault signal indicating that the rotation of the fan is abnormal or the ambient temperature of the fan is too high.

Abstract: A fan driver is provided to drive a DC brushless fan. The fan driver has a pulse generator for receiving a signal indicating the phase of a rotor in the fan from a Hall element and generating two pulse signals whose phases are inverted by about 180.degree.. Two driving units activated by the two pulse signals, respectively, are provided to alternatively apply current to the two coils thereby generating magnetic fields to rotate the rotor of the fan. Two switch elements are connected to the two driving units so that anti-electromotive voltage generated by one of the two coils can be transferred to the other coil.

Abstract: A motor drive circuit includes an amplifying and comparing circuit, a multiplexer, an input control circuit and a drive pulse generator. The amplifying and comparing circuit receives an output signal from a Hall element and generates an amplified output signal. The input control circuit detects whether the Hall element is a Hall sensor or a Hall IC for controlling the multiplexer to have its output from either the Hall IC or the amplifying and comparing circuit. The drive pulse generator has an input connected to the output of the multiplexer, and has four outputs connected to four MOS transistors respectively for generating clock signals to drive the four MOS transistors to provide driving current to the motor.