Patents Assigned to Silicon Wafer Technologies
  • Patent number: 6995075
    Abstract: Process for forming a fragile layer inside of a single crystalline substrate near one of the substrate surfaces. The fragile layer contains hydrogen mostly in form of hydrogen platelets oriented in parallel to each other and to neighboring crystal surface. The fragile layer is preferably grown within a single crystalline silicon wafer to facilitate the detachment of an overlaying thin layer of single crystalline silicon from the initial wafer. The hydrogen layer is grown on a seed layer. The seed layer is preferably formed by ion implantation of inert gases at doses in 1015 cm?2 range. The hydrogen layer is grown by plasma hydrogenation of the substrate. The hydrogenation process begins at substrate temperature not exceeding 250° C., and than continues at higher temperature not exceeding 400° C.
    Type: Grant
    Filed: July 12, 2002
    Date of Patent: February 7, 2006
    Assignee: Silicon Wafer Technologies
    Inventor: Alexander Usenko
  • Patent number: 6344417
    Abstract: A method for fabricating MEMS wherein a structural member is released without using a sacrificial layer. In one embodiment, the method comprises forming a buried hydrogen-rich layer in a semiconductor substrate, defining a release structure in the semiconductor substrate above the buried hydrogen-rich layer, and separating at least a portion of the release structure from the semiconductor substrate by cleaving the semiconductor substrate at the buried hydrogen-rich layer. The method can be used to fabricate hybrid devices wherein a MEMS device and a semiconductor device are formed on the same chip.
    Type: Grant
    Filed: August 8, 2000
    Date of Patent: February 5, 2002
    Assignee: Silicon Wafer Technologies
    Inventor: Alexander Usenko