Abstract: An ethernet device with safety features at the physical layer and a method for a bi-directional data transfer between two ethernet devices, includes at least one of two ethernet devices with safety features at the physical layer. The ethernet device can switch safety critical traffic from a first ethernet channel to a second ethernet channel if a safety problem has been detected for the first ethernet channel.
Type:
Grant
Filed:
September 16, 2022
Date of Patent:
March 18, 2025
Assignee:
SILICONALLY GMBH
Inventors:
Benedikt Schonlau, Felix Neumärker, Sebastian Höppner, Markus Winter, Stephan Hartmann
Abstract: A method and timing recovery circuit for recovering a sampling clock from a serial data stream encoded using Pulse-Amplitude-Modulation applies a filter pattern decoder to detected symbol sequence at more than two adjacent data symbols, particularly to the detected symbol patterns of four adjacent samples ?(k?2), ?(k?1), ?(k), ?(k+1), and calculates an estimated phase error e(k).
Abstract: An ethernet device with safety features at the physical layer and a method for a bi-directional data transfer between two ethernet devices, includes at least one of two ethernet devices with safety features at the physical layer. The ethernet device can switch safety critical traffic from a first ethernet channel to a second ethernet channel if a safety problem has been detected for the first ethernet channel.
Type:
Application
Filed:
September 16, 2022
Publication date:
October 3, 2024
Applicant:
SILICONALLY GMBH
Inventors:
Benedikt SCHONLAU, Felix NEUMÄRKER, Sebastian HÖPPNER, Markus WINTER, Stephan HARTMANN
Abstract: The invention relates to a method and timing recovery circuit for recovering a sampling clock from a serial data stream encoded using Pulse-Amplitude-Modulation, comprising: applying a filter pattern decoder to detected symbol sequence at more than two adjacent data symbols, particularly to the detected symbol patterns of four adjacent samples {circle around (y)}(k?2), {circle around (y)}(k?1), {circle around (y)}(k), {circle around (y)}(k+1), and calculating an estimated phase error e(k).
Abstract: A multi-mode line driver circuit supporting different communication standards includes an output for the network connection, and driver elements connected in parallel to the output. Each driver element is connected to a positive and negative supply voltage, and includes a resistor, a first switch and a second switch. The resistor is connected to the output and via the first switch to the positive supply voltage and via the second switch to the negative supply voltage. The driver circuit also includes at least one coding block with an input for a digital signal to be transmitted over the network connection. The coding block provides control signals for the first switch and the second switch for connecting the resistor of each driver element to the positive supply voltage or the negative supply voltage. The digital signal of the multi-mode line driver circuit is coded according to a communication standard.
Type:
Application
Filed:
October 22, 2021
Publication date:
November 9, 2023
Applicant:
SILICONALLY GMBH
Inventors:
Franz Marcus SCHUEFFNY, Stefan HAENZSCHE, Sebastian HOEPPNER, Martin KREISSIG