Patents Assigned to Siliconix Inc.
  • Patent number: 5218228
    Abstract: A method is disclosed which produces a high voltage MOS transistor with a deep retrograde N-well region, which includes a buried layer, said deep retrograde well region acting to increase the breakdown voltage of the MOS transistor and reduce the current gain of the inherent parasitic bipolar transistor. To achieve a high degree of control over the impurity concentration of the buried layer without affecting the impurity concentration in the N-well region, two dopants species are diffused or implanted in the N+ buried layer: one, a slow diffusing dopant, such as antimony or arsenic, and the other, a more rapidly diffusing dopant, such as phosphorus. A P- type epitaxial layer is grown over the buried layer and an N-well is formed in the epitaxial layer over the buried layer.
    Type: Grant
    Filed: March 11, 1992
    Date of Patent: June 8, 1993
    Assignee: Siliconix Inc.
    Inventors: Richard K. Williams, Robert W. Busse, Richard A. Blanchard
  • Patent number: 4164733
    Abstract: Analog to digital converter of the type in which an analog input signal is integrated and charge is applied to the integrating capacitor in predetermined measured quantities to offset or balance the effect of the input signal. A counter is incremented and decremented in accordance with the balancing charge to provide a count corresponding to the input signal. Means is included for eliminating errors due to offset voltages and imperfections in the virtual ground of the integrator, and the operating level of the integrator during a conversion is set independently of the sources which supply the balancing charge.
    Type: Grant
    Filed: April 29, 1977
    Date of Patent: August 14, 1979
    Assignee: Siliconix Inc.
    Inventors: George F. Landsburg, Lorimer K. Hill