Abstract: A method, in one embodiment, can include forming a core trench and a termination trench in a substrate. The termination trench is wider than the core trench. In addition, a first oxide can be deposited that fills the core trench and lines the sidewalls and bottom of the termination trench. A first polysilicon can be deposited into the termination trench. A second oxide can be deposited above the first polysilicon. A mask can be deposited above the second oxide and the termination trench. The first oxide can be removed from the core trench. A third oxide can be deposited that lines the sidewalls and bottom of the core trench. The first oxide within the termination trench is thicker than the third oxide within the core trench.

Abstract: A Merged P-i-N Schottky device in which the oppositely doped diffusions extend to a depth and have been spaced apart such that the device is capable of absorbing a reverse avalanche energy comparable to a Fast Recovery Epitaxial Diode having a comparatively deeper oppositely doped diffusion region.

Abstract: A SiC Schottky diode which includes a Schottky barrier formed on a silicon face 4H—SiC body.

Abstract: A silicon carbide device includes at least one power electrode on a surface thereof, a solderable contract formed on the power electrode, and at least one passivation layer that surrounds the solderable contact but is spaced from the solderable contract, thereby forming a gap.

Abstract: An improved superjunction semiconductor device includes a charged balanced pylon in a body region, where a top of the pylon is large to create slight charge imbalance. A MOSgated structure is formed over the top of the pylon and designed to conduct current through the pylon. By increasing a dimension of the top of the pylon, the resulting device is less susceptible to variations in manufacturing tolerances to obtain a good breakdown voltage and improved device ruggedness.

Abstract: A SiC JFET that includes a plurality of trenches formed in a SiC semiconductor body of one conductivity each trench having a region of another conductivity formed in the bottom and sidewalls thereof.

Abstract: A chip-scale schottky package which has at least one cathode electrode and at least one anode electrode disposed on only one major surface of a die, and solder bumps connected to the electrode for surface mounting of the package on a circuit board.

Abstract: A process for forming a Schottky barrier to silicon to a barrier height selected at a value between 640 meV and 840 meV employs the deposition of a platinum or nickel film atop the silicon surface followed by the deposition of the other of a platinum or nickel film atop the first film. The two films are then exposed to anneal steps at suitable temperatures to cause their interdiffusion and an ultimate formation of Ni2Si and Pt2Si contacts to the silicon surface. The final silicide has a barrier height between that of the Pt and Ni, and will depend on the initial thicknesses of the Pt and Ni films and annealing temperature and time. Oxygen is injected into the system to form an SiO2 passivation layer to improve the self aligned process.

Abstract: A semiconductor device in one embodiment includes a depletion junction, a peripheral region adjacent the depletion junction, and a buffer layer. The buffer layer is adapted to reduce localization of avalanche breakdown proximate the interface between the depletion junction and the peripheral region.

Abstract: A SiC Schottky diode which includes a Schottky barrier formed on a silicon face 4H-SiC body.

Abstract: A superjunction device that includes a termination region having a transition region adjacent the active region thereof, the transition region including a plurality of spaced columns.

Abstract: A semiconductor device in one embodiment includes a depletion junction, a peripheral region adjacent the depletion junction, and a buffer layer. The buffer layer is adapted to reduce localization of avalanche breakdown proximate the interface between the depletion junction and the peripheral region.

Abstract: A SiC Schottky diode which includes a Schottky barrier formed on a silicon face 4H—SiC body.

Abstract: A semiconductor device in one embodiment includes a depletion junction, a peripheral region adjacent the depletion junction, and a buffer layer. The buffer layer is adapted to reduce localization of avalanche breakdown proximate the interface between the depletion junction and the peripheral region.

Abstract: A SiC JFET that includes a plurality of trenches formed in a SiC semiconductor body of one conductivity each trench having a region of another conductivity formed in the bottom and sidewalls thereof.

Abstract: Merged P-i-N Schottky device in which the oppositely doped diffusions extend to a depth and have been spaced apart such that the device is capable of absorbing a reverse avalanche energy comparable to a Fast Recovery Epitaxial Diode having a comparatively deeper oppositely doped diffusion region.

Abstract: A SiC JFET that includes a plurality of trenches formed in a SiC semiconductor body of one conductivity each trench having a region of another conductivity formed in the bottom and sidewalls thereof.

Abstract: An SiC Schottky diode die or a Si Schottky diode die is mounted with its epitaxial anode surface connected to the best heat sink surface in the device package. This produces a substantial increase in the surge current capability of the device.

Abstract: A mask structure and process for forming trenches in a silicon carbide or other wafer, and for implanting impurities into the walls of the trenches using the same mask where the mask includes a thin aluminum layer and a patterned hard photoresist mask. A thin LTO oxide may be placed between the metal layer and the hard photoresist mask.

Abstract: An improved superjunction semiconductor device includes a charged balanced pylon in a body region, where a top of the pylon is large to create slight charge imbalance. A MOSgated structure is formed over the top of the pylon and designed to conduct current through the pylon. By increasing a dimension of the top of the pylon, the resulting device is less susceptible to variations in manufacturing tolerances to obtain a good breakdown voltage and improved device ruggedness.