Abstract: A method of manufacturing a semiconductor device includes defining a first voltage region, a second voltage region, and a third voltage region on a substrate. The first, second, and third voltage regions are configured to handle first, second, and third voltage levels, respectively, that are different from each other. A nitride layer overlying the first, second, and third voltage regions are formed. An oxide layer overlying the nitride layer is formed. The oxide layer is patterned to expose a portion of the nitride layer overlying the first voltage region. The exposed portion of the nitride layer is removed using a wet etch process. A first gate oxide layer overlying the first voltage region is formed. Portions of the oxide layer and the nitride layer overlying the second and third voltage regions are removed. Impurities are selectively implanted into the third voltage region while preventing the impurities from being provided in the second voltage region.
Type:
Grant
Filed:
May 10, 2005
Date of Patent:
April 24, 2007
Assignee:
Silterra
Inventors:
Inki Kim, Sang Yeon Kim, Min Paek, Ong Boon Teong, Oh Choong Young, Ng Chun Leng, Joung Joon Ho
Abstract: A chemical mechanical polishing apparatus includes a polishing pad. A pad conditioner includes a static conditioner head having a surface area configured to contact and condition the pad. The surface area has a first end proximate to an axis of rotation of the pad and a second end remote from the axis of rotation of the pad. The first end defines a first arc length, and the second end defines a second arc length, where the first arc length and the second arc length are substantially identical.
Abstract: A chemical mechanical polishing apparatus includes a polishing pad. A pad conditioner includes a static conditioner head having a surface area configured to contact and condition the pad. The surface area has a first end proximate to an axis of rotation of the pad and a second end remote from the axis of rotation of the pad. The first end defines a first arc length, and the second end defines a second arc length, where the first arc length and the second arc length are substantially identical.
Abstract: A method for forming a semiconductor device having a nitrided gate oxide includes flowing a gas including N2O into an external torch. The gas is decomposed in the external torch to provide NO. The decomposed gas having NO is flowed into a process chamber including a substrate to form a nitrided gate oxide over the substrate.