Abstract: A computer system includes a parity bit emulator circuit which generates a parity bit to be associated with a data byte output by a signal in-line memory module (SIMM) to a CPU. Each parity bit emulator monitors four consecutive write cycles to determine whether the system parity is even or odd, and thereafter monitors each write cycle to determine if a data transfer error has occurred during a write from the CPU to the SIMM. A state machine circuit provides appropriate timing for write and read cycle memory access protocols.
Abstract: A communications card provides an electronic interface between a host computer and a transmission media line. The communications card includes a releasable adaptor which interconnects an electrical connector of the transmission media line to the communications card when in use. The adaptor also integrates into the overall configuration of the communication card in a storage position to present a configuration that conforms with PCMCIA communication card architecture. The adaptor releasably attaches to the communication card when in the storage position. The releasable connection between the communication card and the adaptor allows replacement of the adaptor when worn or damages, without replacing the entire communications card. And the integral storage position of the adaptor allows a user to internally carry the adaptor with the communications card within the host computer.
Abstract: A multi-chip memory module comprises multiple standard, surface-mount-type memory chips stacked on top of each other, and a pair of printed circuit boards mounted on opposite sides of the memory chips to electrically interconnect the memory chips. Each printed circuit board has vias that are positioned to form multiple rows, with each row of vias used to connect the printed circuit board to a respective memory chip. The vias falling along the bottom-most row of each printed circuit board are also exposed and are used to surface mount the multi-chip module to pads of a memory board.
Abstract: A multi-chip memory module comprises multiple standard, surface-mount-type memory chips stacked on top of each other, and a pair of printed circuit boards mounted on opposite sides of the memory chips to electrically interconnect the memory chips. Each printed circuit board has vias that are positioned to form multiple rows, with each row of vias used to connect the printed circuit board to a respective memory chip. The vias falling along the bottom-most row of each printed circuit board are also exposed and are used to surface mount the multi-chip module to pads of a memory board.