Abstract: An electronic device for data processing is disclosed having a CPU (3), a Closely Coupled Memory (5), an external memory system (8), and a first clock unit (1) and second clock unit (9) for receiving a main clock signal (2) and converting the main clock signal (2) into a first clock signal (6) for at least the Central Processing Unit (3) and Closely Coupled Memory (5) and a second clock signal (10) for the external memory (8). The first clock signal has a first clock frequency and the second clock signal has a second clock frequency being higher than said first clock frequency and wherein the device is configured to switch per time unit the external memory for an active period Tactive in an active state and for a standby period Tstandby in a standby state to retrieve a predetermined amount of data from the external memory per time unit.

Abstract: A method and system for emulating a byte-wise programmable memory in a sector-wise erasable memory, where emulating a byte-wise programmable memory in a sector-wise erasable memory is based on dividing the sector-wise erasable memory in a plurality of sectors, dividing each of the sectors into several memory locations suitable to store containers, with each container having a header and a payload portion, and storing a data value relating to an application in the payload portion of one of the containers and header information identifying the application in the header in an available container. The containers can be block containers, and the data portion can have two or more payload values. The storing action can be performed in such a way that the two or more payload values in the payload portion together uniquely represent the data value.

Abstract: A system and method is disclosed for reconstructing high frequency components of a digital audio signal using a harmonic enhancer in a baseband integrated circuit of a receiver handset. The original spectrum of the digital audio signal is upsampled in a times two (2) upsample unit to double the size of the bandwidth. A low pass filter then removes a high frequency alias of the original spectrum. The spectrum is then modulated with a first carrier frequency and sent to a first filter bank where a low pass filter and a high pass filter shape the modulated harmonic spectrum. After gain adjustment, the modulated harmonic spectrum is added to a delayed version of the original spectrum. Additional harmonic spectra are similarly created at other carrier frequencies and added to the audio output spectra to reconstruct high frequency components of the audio signal.

Abstract: A power reduction method for a first communication device that can communicate with a second communication device in a synchronized fashion. The first communication device has an electronic module and the method includes generating a communication device shut down signal by the electronic module in order to shut down the communication device apart from the electronic module at a first moment in time, generating a communication device wake-up signal by the electronic module in order to switch on and start booting of the communication device at a second moment in time after the first moment in time, and generating a communication device synchronization signal by the electronic module in order to allow the communication device to restart communicating with the second communication device in the synchronized fashion at a third moment in time after the second moment in time.

Abstract: Voltage regulator for providing an output voltage (Vout) to a load (Zload) having an output transistor (T1), an operational amplifier (OA), and a first reference voltage source (VS). The negative input of the operational amplifier (OA) is connected to a feedback line (FL) to receive an input voltage derived from the output voltage. The first reference voltage source (VS) provides a reference voltage (Vref) to the positive input (IN2) of the operational amplifier (OA). The output (O1) of the operational amplifier (OA) is connected to a floating voltage source (FVS; C1). The other side of the floating voltage source is connected to a gate terminal (G) of the output transistor (T1). The floating voltage source (FVS) provides a voltage level (Vg) at the gate terminal of the output transistor (T1) higher than the output voltage of the operational amplifier (OA).

Abstract: An active transconductance is provided by converting an input voltage into a current, and providing the current to a node which is maintained at a generally fixed voltage. Current is mirrored from the fixed voltage node to an output node. Such an active transconductance circuit can meet conventional performance specifications, but at a lower supply current, and/or with lower circuit complexity, and/or with a lower circuit area requirement.

Abstract: A current mode multiplier circuit is provided based on the square root voltage-current relationship of an MOS transistor. The circuit includes first, second and third MOS transistors with a common aspect ratio, and first and second current sources that respectively provide first and second input currents that represent first and second factors to be multiplied. The first and second MOS transistors produce first and second voltages as a function of the first and second input currents, and the third MOS transistor produces a third current as a function of the first and second voltages. In response to the third current, the circuit produces a product signal that represents a product of the first and second factors.

Abstract: An operational amplifier is provided that includes a Class-AB stage and a Class-B stage coupled in parallel with each other to form an output stage. The Class-AB stage is operable to drive an output load. The Class-B stage is also operable to drive the output load and includes a first level-shifting circuit and a second level-shifting circuit. Each of the level-shifting circuits includes a neutralizing transistor.

Abstract: A differential difference amplifier is provided for amplifying an input signal having a magnitude close to zero (or a negative supply voltage) and adding an offset voltage to the amplified input signal.

Abstract: A charge pump includes a current source capable of generating a reference current. The charge pump also includes a first current mirror capable of conducting a first current. The charge pump further includes a second current mirror capable of conducting a second current and the reference current. In addition, the charge pump includes an output coupled to the first and second current mirrors and capable of providing one of the first and second currents as an output of the charge pump. The first current mirror may be capable of conducting the first current and a second reference current. The second current mirror may be capable of conducting the second current, the reference current, and the second reference current.