Patents Assigned to Sitronix Technology Corp.
  • Patent number: 9653035
    Abstract: The present disclosure provides a voltage calibration circuit. The voltage calibration circuit includes a coupling voltage detection circuit and a common voltage circuit. The coupling voltage detection circuit is used for detecting a coupling voltage in an initial phase and generating a compensation voltage according to the coupling voltage. The common voltage circuit is used for adjusting a common voltage according to the compensation voltage and outputting the common voltage to a display module in a display phase.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: May 16, 2017
    Assignee: Sitronix Technology Corp.
    Inventors: Tsun-Sen Lin, Min-Nan Liao
  • Patent number: 9614515
    Abstract: The present invention disclosed an electrical dual control switch device and the method of controlling thereof. By applying two electrical switches with connection method of conventional mechanical type dual control switch device. The operating status of the electrical switch could be detected by the AC waveform of the power transmission line of the other electrical switch. Therefore, the objection of electrical controlling the loading device will be realized. The loading device could be remotely control and the usage of the power could also effectively calculate. Further the present invention could also protected against overload, work with touch device and sets a timer for automatically shut down the power.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: April 4, 2017
    Assignees: ARTINFAC TECHNOLOGY CORP., SITRONIX TECHNOLOGY CORP.
    Inventor: Shih-Chiang Sun
  • Patent number: 9602104
    Abstract: An output buffer with an offset cancellation structure for an LCD source driver includes an operational amplifier, for driving an output signal of the output buffer according to a data signal from a data input terminal of the output buffer; a reference voltage generator, for generating a reference voltage and inputting the reference voltage to the operational amplifier; and a sampling capacitor, coupled between a second input terminal of the operational amplifier and the data input terminal of the output buffer in a first phase, and coupled between the second input terminal of the operational amplifier and an output terminal of the operational amplifier in a second phase, wherein the second input terminal of the operational amplifier is further coupled to the output terminal of the operational amplifier in the first phase. The output signal outputs the data signal where the offset voltage is cancelled in the second phase.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: March 21, 2017
    Assignee: Sitronix Technology Corp.
    Inventors: Ming-Wei Hsu, Chern-Lin Chen
  • Patent number: 9583067
    Abstract: The LCD device comprises a plurality of scan groups and a plurality of data electrodes; each scan group comprises a plurality of scan electrodes. The driving method comprises the following steps. First the scan driving circuit provides a plurality of scan signals to the plurality of scan electrodes of the plurality of scan groups, respectively. Each scan signal includes at least a select signal, at least a non-select signal, at least a select cycle, and at least a non-select cycle. The select signal is located in the select cycle, while the non-select signal, the non-select cycle. When an Nth scan electrode is located in the select cycle, an (N?1)th or (N+1)th scan electrode of the plurality of scan electrodes is located in the non-select cycle. Then, the data driving circuit provides a data signal to each of the data electrodes according to a plurality of display data for driving the LCD device to display an image by using the plurality of scan signals and the plurality of data signals.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: February 28, 2017
    Assignee: Sitronix Technology Corp.
    Inventors: Chen-Yuan Yang, Kuo Ching Yen
  • Patent number: 9559696
    Abstract: A circuit buffer for outputting a voltage signal having a magnitude greater than a withstand voltage of any circuit element in the circuit buffer includes a first transistor and a second transistor. The first transistor includes a first terminal and a second terminal electrically connected to an input terminal and an output terminal of the circuit buffer respectively, a third terminal electrically connected to a first power supply terminal, and a fourth terminal electrically connected to the third terminal of the first transistor. The second transistor includes a first terminal and a second terminal electrically connected to the input terminal and the output terminal of the circuit buffer respectively, a third terminal electrically connected to a second power supply terminal, and a fourth terminal electrically connected to the third terminal of the second transistor. Voltages of the first and second power supply terminal are switched between two different levels, respectively.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: January 31, 2017
    Assignee: Sitronix Technology Corp.
    Inventor: Min-Nan Liao
  • Patent number: 9524056
    Abstract: The present disclosure provides a capacitor voltage information sensing circuit. The capacitor voltage information sensing circuit includes a mixer and an analog filter. The mixer includes a first input terminal for receiving a reference signal, a second input terminal for receiving a voltage signal, the voltage signal includes capacitor voltage information and a noise when a touch occurs, a first output terminal for outputting a first differential signal according to the voltage signal and the reference signal, and a second output terminal for outputting a second differential signal according to the voltage signal and the reference signal. The analog filter is coupled to the mixer for generating a first low-frequency signal and a second low-frequency signal according to the first differential signal and second differential signal.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: December 20, 2016
    Assignee: Sitronix Technology Corp.
    Inventors: Chun-Kuan Wu, Ching-Jen Tung, Chen-Yuan Yang, Chun-Yu Lin
  • Patent number: 9506974
    Abstract: An active probe card capable of improving testing bandwidth of a device under (DUT) test includes a printed circuit board; at least one probe needle, affixed to a first surface of the printed circuit board for probing the DUT; at least one connection member, electrically connected to the at least one probe needle; and an amplification circuit, formed on the printed circuit board and coupled to the at least one connection member for amplifying an input or output signal of the DUT.
    Type: Grant
    Filed: September 3, 2014
    Date of Patent: November 29, 2016
    Assignee: Sitronix Technology Corp.
    Inventors: Hung-Wei Lai, Tsung-Jun Lee
  • Patent number: 9509298
    Abstract: A driving module, for a display device, includes a first transistor comprising a gate coupled to a first node, a drain coupled to an output end, and a source coupled to a first positive voltage source; a second transistor comprising a gate coupled to a second node, a drain coupled to the output end, and a source coupled to a first negative voltage source; and a voltage generating unit, coupled to an input end, a second positive voltage source and a second negative voltage source for generating a first voltage at the first node and a second voltage at the second node; wherein a difference between a first positive voltage of the first positive voltage source and the first voltage is smaller than a first threshold and a difference between a first negative voltage of the first negative voltage source and the second voltage is smaller than a second threshold.
    Type: Grant
    Filed: October 13, 2014
    Date of Patent: November 29, 2016
    Assignee: Sitronix Technology Corp.
    Inventor: Hung-Yu Lu
  • Patent number: 9502967
    Abstract: The present disclosure provides a method of reusing electrical energy for a charge pump. The method comprises operating in a reusing phase after a boosting phase is completed; retrieving energy of parasitic capacitance in the reusing phase; and reusing the energy of the parasitic capacitance for an internal circuit.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: November 22, 2016
    Assignee: Sitronix Technology Corp.
    Inventor: Hung-Yu Lu
  • Patent number: 9467159
    Abstract: An analog-to-digital converting device includes a converting module, for sampling an analog input voltage according to a plurality of sampling signals to generate a comparing voltage and generating a comparing signal according to the comparing voltage, wherein the converting module comprises a plurality of capacitors and each of the plurality of capacitors couples between one of the plurality sampling signals and the comparing voltage; a control module, for adjusting the plurality of sampling signals according to the comparing signal, to generate a digital signal corresponding to the analog input voltage, wherein a plurality of bits of the digital signal are respectively corresponding to the capacitances of the plurality of capacitors; and a calibration module, for adjusting the capacitances of the plurality of capacitors according to the digital signal.
    Type: Grant
    Filed: November 3, 2015
    Date of Patent: October 11, 2016
    Assignee: Sitronix Technology Corp.
    Inventor: Hung-Yen Tai
  • Patent number: 9449710
    Abstract: The present invention relates to a decoding and scan driver, which comprises a level-shift circuit, a decoding circuit, an output driving circuit, and a control circuit. The level-shift circuit receives a plurality of input signals and shifts the voltage levels of the plurality of input signals for producing a plurality of decoding control signals. The decoding circuit is coupled to the level-shift circuit and produces a plurality of decoding signals according to the plurality of decoding control signals. The output driving circuit is coupled to the decoding circuit, produces a driving signal sequentially according to the plurality of decoding signals, and outputs the driving signal for driving a display panel. The control circuit is coupled to the output driving circuit, produces a control signal according to one of the plurality of input signals, and transmits the control signal to the output driving circuit for controlling the output driving circuit to output the driving signal.
    Type: Grant
    Filed: February 6, 2013
    Date of Patent: September 20, 2016
    Assignee: Sitronix Technology Corp.
    Inventor: Chung-Hsin Su
  • Patent number: 9443486
    Abstract: The present invention relates to a driving circuit for a display panel and the driving module thereof and a display device and the method for manufacturing the same. The present invention comprises a power generating module, a plurality of signal generating units, a power generating circuit, and a scan control circuit. The power generating module generates a supply power source according to an input power source. The plurality of signal generating units are coupled to the power generating module and generate a plurality of control signals according to the supply power source and a plurality of input signals. The power generating circuit generates a driving power source. The scan control circuit is coupled to the power generating circuit and the plurality of signal generating unit, and generates a plurality of scan signals according to the driving power source and at least one of the plurality of control signals.
    Type: Grant
    Filed: January 17, 2014
    Date of Patent: September 13, 2016
    Assignee: Sitronix Technology Corp.
    Inventors: Ping Lin Liu, Shih Chieh Hung
  • Patent number: 9438235
    Abstract: A circuit buffer for outputting a voltage signal having a magnitude greater than a withstand voltage of any circuit element in the circuit buffer includes a first transistor and a second transistor. The first transistor includes a first terminal and a second terminal electrically connected to an input terminal and an output terminal of the circuit buffer respectively, a third terminal electrically connected to a first power supply terminal, and a fourth terminal electrically connected to the third terminal of the first transistor. The second transistor includes a first terminal and a second terminal electrically connected to the input terminal and the output terminal of the circuit buffer respectively, a third terminal electrically connected to a second power supply terminal, and a fourth terminal electrically connected to the third terminal of the second transistor. Voltages of the first and second power supply terminal are switched between two different levels, respectively.
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: September 6, 2016
    Assignee: Sitronix Technology Corp.
    Inventor: Min-Nan Liao
  • Patent number: 9435863
    Abstract: An integrated circuit (IC) testing interface capable of upgrading an automatic test equipment (ATE) for testing a semiconductor device includes at least one pin for receiving or transmitting at least a test signal to a tester of the automatic test equipment, a plurality of digitizers coupled to the at least one pin for generating a digital signal, a processing means coupled to the plurality of digitizers for processing the digital signal, and a connection unit for connecting the processing means with a computing device for transmitting an output signal from the processing means to the computing device, where the IC testing interface is disposed between the tester and a prober of the automatic test equipment.
    Type: Grant
    Filed: September 21, 2014
    Date of Patent: September 6, 2016
    Assignee: Sitronix Technology Corp.
    Inventors: Chun-Chi Chen, Hung-Wei Lai, Tsung-Jun Lee
  • Patent number: 9378667
    Abstract: The present invention relates to a scan driving circuit, which comprises a decoding circuit, a plurality of level-shift driving circuits, and a control circuit. The decoding circuit produces a decoding signal according to a decoding control signal. The plurality of level-shift driving circuits are coupled to the decoding circuit and produce scan signal sequentially according to the decoding signal. The control circuit is coupled to the plurality of level-shift driving circuit. The control circuit produces a first control signal and a second control signal according to the decoding control signal and transmits the first and second control signals to the plurality of level-shift driving circuits for controlling their turning on and off. Accordingly, by means of the control circuit according to the present invention, the circuit area of each level-shift driving circuit can be reduced, and thus the cost can be reduced as well.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: June 28, 2016
    Assignee: Sitronix Technology Corp.
    Inventor: Chung-Hsin Su
  • Patent number: 9318044
    Abstract: A driving circuit for a display includes a logic unit and a memory array coupled to the logic unit for turning on a plurality of memory cells corresponding to the word-line according to a word-line scanning signal to refresh the plurality of memory cells corresponding to the word-line; wherein the memory array has a first number of bit-lines and a second number of word-lines, wherein the driving circuit is used for driving a display panel having a third number of data-lines and a fourth number of scan-lines, and a product of the first number and the second number is equal to a product of the third number and the fourth number.
    Type: Grant
    Filed: October 16, 2015
    Date of Patent: April 19, 2016
    Assignee: Sitronix Technology Corp.
    Inventors: Chung-Hsin Su, Tsun-Sen Lin
  • Patent number: 9268419
    Abstract: The present relates to a display panel and the driving circuit thereof. A scan driving circuit of the driving circuit of the display panel according to the present invention produces a plurality of scan signal for scanning a plurality of pixel structures of the display panel. In addition, a data driving circuit produces a plurality of data signals corresponding to the plurality of scan signals and transmits the plurality of data signals to the plurality of pixel structures, where a common electrode of the plurality of pixel structures is coupled to a ground. Moreover, the data driving circuit according to the present invention adjusts the signal levels of a plurality of gamma voltages according to a compensation signal of a compensation circuit, and thus further adjusting the levels of the data signals.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: February 23, 2016
    Assignee: Sitronix Technology Corp.
    Inventor: Min-Nan Liao
  • Patent number: 9264058
    Abstract: An analog-to-digital converting device includes a converting module for sampling an input voltage according to a plurality of sampling signals, to generate a comparing signal; a control module, for adjusting the plurality of sampling signal according to the comparing signal, to generate a first digital signal corresponding to the input voltage and a plurality of weights; and a calibration module, for adjusting the plurality of sampling signal according to the first digital signal to make the control module generate a second digital signal and for adjusting the plurality of weights according to the first digital signal and the second digital signal; wherein the second digital signal is different from the first digital signal and is corresponding to the plurality of weights.
    Type: Grant
    Filed: July 13, 2015
    Date of Patent: February 16, 2016
    Assignee: Sitronix Technology Corp.
    Inventors: Hung-Yen Tai, Yao-Sheng Hu
  • Patent number: 9250644
    Abstract: A power conversion system in an electronic device is utilized for converting an input voltage of a power source terminal to a required voltage of a load circuit to provide power to the load circuit. The power conversion system includes a first voltage conversion circuit for converting the input voltage to the required voltage of the load circuit according to a first control signal; and a power control module for generating the first control signal according to a starting signal or a load voltage of the load circuit; wherein the load circuit receives the voltage outputted from the first voltage conversion circuit to perform operations.
    Type: Grant
    Filed: May 19, 2014
    Date of Patent: February 2, 2016
    Assignee: Sitronix Technology Corp.
    Inventors: Chung-Hsin Su, Tsun-Sen Lin
  • Patent number: 9202428
    Abstract: A method of refreshing a memory array for a driving circuit includes generating a word-line scanning signal corresponding to a word-line of a memory array, and turning on a plurality of memory cells corresponding to the word-line of the memory array according to the word-line scanning signal to refresh the plurality of memory cells corresponding to the word-line of the memory array, wherein the memory has a first number of bit-lines and a second number of word-lines.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: December 1, 2015
    Assignee: Sitronix Technology Corp.
    Inventors: Chung-Hsin Su, Tsun-Sen Lin