Patents Assigned to SITRUS TECHNOLOGY CORPORATION
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Patent number: 11894655Abstract: An H-bridge integrated laser driver optimizes power dissipation, impedance matching, low-swing and high-swing reliability for electro-absorption modulated laser (EML) and directly modulated laser diode (DML) applications. The laser driver includes a retimer for converting low-speed parallel data to a high-speed serial bit stream and to an inverted representation of the high-speed parallel bit stream, an M-bit PMOS DAC configured to receive a first buffered bit stream, an N-bit NMOS DAC configured to receive a second buffered bit stream substantially synchronized with the first buffered bit stream. A protective device is coupled between the M-bit DAC and the N-bit DAC.Type: GrantFiled: September 28, 2020Date of Patent: February 6, 2024Assignee: SITRUS TECHNOLOGY CORPORATIONInventors: Karim Vincent Abdelhalim, Michael Q. Le
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Patent number: 11650618Abstract: A referenceless frequency acquisition scheme locks to an unknown data frequency by feedback of sampled data to a digitally controlled oscillator (DCO). A received data signal is converted to deserialized outputs, then by a phase detector to symbol streams of phase updates. Each symbol stream is converted to a lower rate sum, for which absolute values are computed and periodically summed. Absolute value sums are obtained for each frequency over a range of test frequencies to obtain totals, each corresponding to a different test frequency. A critical value is determined from among the totals. The DCO is set to the test frequency corresponding to the critical value as a coarse approximation for the unknown frequency.Type: GrantFiled: January 3, 2022Date of Patent: May 16, 2023Assignee: SITRUS TECHNOLOGY CORPORATIONInventors: Mrunmay Talegaonkar, Michael Q. Le
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Patent number: 11569829Abstract: An ADC system dynamically adjusts threshold levels used to resolve PAM signal amplitudes into digital values. The ADC circuitry includes an analog front end to receive and condition the PAM signal, a low-resolution ADC to digitize the conditioned signal according to a first set of threshold values, and a high-resolution ADC to subsample the conditioned signal to generate subsampled signals. A microprocessor in communication with the low-resolution ADC and the high-resolution ADC derives a statistical value from the subsampled signals, determines an updated set of threshold values, and dynamically replaces the first set of threshold values for the low-resolution ADC with the updated set of threshold values.Type: GrantFiled: August 4, 2021Date of Patent: January 31, 2023Assignee: SITRUS TECHNOLOGY CORPORATIONInventors: Michael Q. Le, Mrunmay Talegaonkar
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Patent number: 11528168Abstract: A method to implement hybrid signal processing includes steps for receiving an analog signal at a receiver frontend, sampling the received analog signal and storing the analog sampled signals using a plurality of sampling circuitries inside the receiver frontend. Then, processing the plurality of analog sampled signals using interleaved feed-forward equalizers (FFEs) to provide FFE interleaved sampled signal values corresponding to each of the sampling circuitries. Then, processing the analog sampled signals at an interleaved Decision Feedback Equalizer (DFE) to obtain DFE interleaved sampled signal values, summing each of the FFE interleaved sampled signal values with output from one of the DFE interleaved sampled signal values to provide equalizer output signal values, and digitizing the equalizer output signal values to provide digital data bits corresponding to each of the equalizer output signal values.Type: GrantFiled: August 3, 2020Date of Patent: December 13, 2022Assignee: SITRUS TECHNOLOGY CORPORATIONInventors: Michael Q. Le, Jorge Antonio Casanova
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Patent number: 11216024Abstract: A referenceless frequency acquisition scheme locks to an unknown data frequency by feedback of sampled data to a digitally controlled oscillator (DCO). A received data signal is converted to deserialized outputs, then by a phase detector to symbol streams of phase updates. Each symbol stream is converted to a lower rate sum, for which absolute values are computed and periodically summed. Absolute value sums are obtained for each frequency over a range of test frequencies to obtain totals, each corresponding to a different test frequency. A critical value is determined from among the totals. The DCO is set to the test frequency corresponding to the critical value as a coarse approximation for the unknown frequency.Type: GrantFiled: March 20, 2021Date of Patent: January 4, 2022Assignee: SITRUS TECHNOLOGY CORPORATIONInventors: Mrunmay Talegaonkar, Michael Q. Le
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Patent number: 11095299Abstract: An ADC system dynamically adjusts threshold levels used to resolve PAM signal amplitudes into digital values. The ADC circuitry includes an analog front end to receive and condition the PAM signal, a low-resolution ADC to digitize the conditioned signal according to a first set of threshold values, and a high-resolution ADC to subsample the conditioned signal to generate subsampled signals. A microprocessor in communication with the low-resolution ADC and the high-resolution ADC derives a statistical value from the subsampled signals, determines an updated set of threshold values, and dynamically replaces the first set of threshold values for the low-resolution ADC with the updated set of threshold values.Type: GrantFiled: March 30, 2021Date of Patent: August 17, 2021Assignee: SITRUS TECHNOLOGY CORPORATIONInventors: Michael Q. Le, Mrunmay Talegaonkar
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Patent number: 10951250Abstract: A DC-shifting predriver has an input port configured for coupling to a serial data stream, an inverting output amplifier having an feedback node and an output port configured for coupling to a transistor at the input to a high-speed DAC or TX driver, and a capacitor AC-coupled between the input port and the feedback node. A weak feedback inverter having structure similar to, but less drive strength than the inverting output amplifier is coupled between the output port and the feedback node to act as a positive feedback latch. The predriver provides a DC shift up to 3V with high reliability and minimal intersymbol interference for data rates from 10 GS/s to 28 GS/s or higher. The predriver may provide multiple input ports implemented as a predriver array in an M-bit system, and the output amplifier may consist of N stages.Type: GrantFiled: April 22, 2020Date of Patent: March 16, 2021Assignee: SITRUS TECHNOLOGY CORPORATIONInventors: Karim Vincent Abdelhalim, Michael Q. Le
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Patent number: 10790636Abstract: An H-bridge integrated laser driver optimizes power dissipation, impedance matching, low-swing and high-swing reliability for electro-absorption modulated laser (EML) and directly modulated laser diode (DML) applications. The laser driver includes a retimer for converting low-speed parallel data to a high-speed serial bit stream and to an inverted representation of the high-speed parallel bit stream, an M-bit PMOS DAC configured to receive a first buffered bit stream, an N-bit NMOS DAC configured to receive a second buffered bit stream substantially synchronized with the first buffered bit stream. A protective device is coupled between the M-bit DAC and the N-bit DAC.Type: GrantFiled: May 14, 2020Date of Patent: September 29, 2020Assignee: SITRUS TECHNOLOGY CORPORATIONInventors: Karim Vincent Abdelhalim, Michael Q. Le