Patents Assigned to Siverge Networks Ltd
  • Patent number: 8483088
    Abstract: A method and a utility to assist configuration of high complexity hierarchically and deeply channelized telecommunication systems using a network language configuration application program interface. The invented method and utility removes major complexity from the process of configuring such devices and systems by accepting a minimal high level description of the required configuration, including an input language used for defining rules and requirements.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: July 9, 2013
    Assignee: Siverge Networks Ltd
    Inventors: Amit Margalit, Uzi Zangi
  • Patent number: 8228943
    Abstract: A method and system for providing Layer 1 time division multiplexing (TDM) framing, multiplexing, and mapping as well as Layer 2 data and protocol processing. One embodiment of the invention provides an integrated Layer1/Layer2 service aggregator within a single-device. Such an embodiment provides a complete System-on-Chip implementation for clear channel and deeply channelized OC-48 (STM-16), 4×OC12/3 (STM4/1) application of 2,000 channels or more. One embodiment implements functionality of Layer2 data and protocol processing as well as Layer1 TDM framing, multiplexing and mapping. For one embodiment, target applications include packet-based transport systems, multi-service access and metro systems, switches and routers and ADM/MSPP systems.
    Type: Grant
    Filed: March 5, 2008
    Date of Patent: July 24, 2012
    Assignee: Siverge Networks Ltd
    Inventors: Moshe De-Leon, Yuval Berger, Yehuda Kra, Barak Perlman
  • Patent number: 7924885
    Abstract: A method and system for providing multi-channel circuit emulation clock recovery wherein a single instance of the clock recovery logic effects circuit emulation clock recovery for multiple channels. For one embodiment of the invention, fine tuning clocking is effected by comparing an outgoing clock with a recovered clock and switching a clock recovery mechanism, the switching performed in conjunction with a multi-channel context.
    Type: Grant
    Filed: November 17, 2007
    Date of Patent: April 12, 2011
    Assignee: Siverge Networks Ltd
    Inventors: Moshe De-Leon, Ofer Kimelman
  • Patent number: 7492825
    Abstract: A system and method for processing an extremely high data rate datastream. Embodiments of the invention provide methods for performing various operations on the datastream in order to map the datastream from one protocol to another as well as providing methods for processing multiple channels of a given protocol. For one embodiment of the invention a portion of a datastream is received to a stream buffer. A data stream window is then created from the received portion, the data stream window containing data of more than one protocol. A corresponding portion of the data of a same protocol, is accessed through each of a plurality of processing machines. The accessed data is concurrently processed at each of the processing machines.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: February 17, 2009
    Assignee: Siverge Networks Ltd
    Inventors: Yehuda Kra, Yuval Berger, Moshe De-Leon, Barak Perlman