Abstract: Provided is a polishing pad including a polishing layer, wherein the nuclear magnetic resonance (NMR) 13C spectrum of a processed composition prepared by adding 1 g of the polishing layer to a 0.3 M aqueous solution of potassium hydroxide (KOH) and allowing the mixture to react in a closed container at a temperature of 150° C. for 48 hours includes a first peak appearing at 15 ppm to 18 ppm, a second peak appearing at 9 ppm to 11 ppm, a third peak appearing at 138 ppm to 143 ppm, and a fourth peak appearing at 55 ppm to 65 ppm, and the softening control index calculated by Equation 1 is 0.10 to 0.45. The polishing pad includes the polishing layer having physical properties corresponding to the softening control index, and thus may exhibit a removal rate and defect prevention performance within desired ranges in polishing of a polishing target.

Abstract: The present disclosure relates to an endpoint detection window of a polishing pad for use in a polishing process. The polishing pad may prevent an error in detection of the endpoint of the polishing process by preventing a difference in endpoint detection performance from occurring due to a difference in the wavelength of a laser between polishing apparatuses. The present disclosure may also provide a method of fabricating a semiconductor device using the polishing pad.

Abstract: The present disclosure relates to a polishing pad, a method of manufacturing the polishing pad, and a method of manufacturing a semiconductor device using the same. In the polishing pad, an unexpanded solid-phase blowing agent is included in a polishing composition when a polishing layer is manufactured, and the unexpanded solid-phase blowing agent is expanded during a curing process to form a plurality of uniform pores in the polishing layer, such that defects occurring on a surface of the semiconductor substrate may be prevented. In addition, the present disclosure may provide a method of manufacturing a semiconductor device to which the polishing pad is applied.

Abstract: The embodiments relate to a polishing pad for use in a chemical mechanical planarization (CMP) process of semiconductors, to a process for preparing the same, and to a process for preparing a semiconductor device using the same. The polishing pad according to the embodiment adjusts the surface roughness characteristics of the polishing pad after polishing, whereby the polishing rate can be enhanced, and the surface residues, surface scratches, and chatter marks of the wafer can be remarkably reduced.

Abstract: A polishing pad sheet which provides optimized interfacial properties for the laminated structure of a polishing pad based on appropriate elasticity and high durability, and in which the polishing pad having the polishing pad sheet applied thereto not only has its intrinsic function such as the polishing rate or the like, but also is capable of realizing the function without damage even during the polishing process in a wet environment for a long time, and a polishing pad to which the polishing pad sheet is applied. The polishing pad sheet includes: a first surface which is a polishing layer attachment surface; and a second surface which is a rear surface of the first surface, wherein the first surface has a value of the following Equation 1 of 4.20 to 5.50:4.20?(|Sv|)/Sz×P (%)?5.50.

Abstract: The composition according to an embodiment employs a mixture of curing agents, which comprises a first curing agent containing sulfur and a second curing agent containing an ester group, whereby it is possible to control the physical properties of the polishing pad as necessary.

Abstract: The present disclosure relates to a polishing composition for a semiconductor process that may increase a polishing rate of a boron-doped polysilicon layer, improve polishing selectivity, prevent a defect of a wafer that may occur in a polishing process, and improving surface roughness of the wafer, and a method for polishing a substrate by using the same. In addition, the present disclosure relates to a method for manufacturing a polished substrate by using a polishing composition for a semiconductor process.

Abstract: Provided is a composition for semiconductor processing including abrasive particles and at least one additive. The composition may exhibit excellent polishing performance by being applied to a process of polishing a semiconductor wafer, may minimize defects in a polishing target surface, may achieve flat polishing without a difference in flatness between a plurality of different layers when used to polish the externally exposed surfaces of the layers, and may be applied to polishing of the surface of a semiconductor wafer having a through silicon via (TSV). Also provided is a method of fabricating a semiconductor device using the composition.

Abstract: The present invention provides a polishing pad whose crosslinking density is adjusted to enhance the performance of the CMP process such as polishing rate and cut pad rate. In addition, in the process for preparing a polishing pad according to the embodiment, it is possible to implement such a crosslinking density by a simple method of controlling the preheating temperature of the mold for curing. Thus, the polishing pad may be applied to a process of preparing a semiconductor device, which comprises a CMP process, to provide a semiconductor device such as a wafer of excellent quality.

Abstract: The present disclosure relates to a polishing system in which accuracy and easiness of attachment and detachment of a polishing pad to a surface plate are maximized, the polishing system including: a surface plate having a polishing pad mounted on an upper portion; and the polishing pad mounted on the surface plate, in which the polishing pad includes: a polishing surface and a surface plate attachment surface that is a rear surface of the polishing surface, the surface plate attachment surface includes: at least one engraved portion, the surface plate includes at least one embossed portion, and the embossed portion and the engraved portion have a complementary coupling structure, and a method of manufacturing a semiconductor device to which the polishing system is applied.

Abstract: A method for measuring displacements of an end effector passing through a load lock gate of semiconductor equipment according to an embodiment of the present disclosure includes measuring a first displacement in a vertical direction and a second displacement in a horizontal direction of the end effector while the end effector passes through the load lock gate, calculating changes in pitch and roll of the end effector based on the measured first displacement, and calculating a change in yaw of the end effector based on the measured second displacement.

Abstract: Embodiments relate to a polishing pad, which comprises a window having a hardness similar to that of its polishing layer. Since the polishing pad comprises a window having a hardness and a polishing rate similar to those of its polishing layer, it can produce an effect of preventing scratches on a wafer during a CMP process. In addition, the polishing layer and the window of the polishing pad have a similar rate of change in hardness with respect to temperature, so that they can maintain a similar hardness despite a change in temperature during the CMP process.

Abstract: The present disclosure provides a polishing pad, which may maintain polishing performances required for a polishing process, such as a removal rate and a polishing profile, minimize defects that may occur on a wafer during the polishing process, and polish layers of different materials so as to have the same level of flatness even when the layers are polished at the same time, and a method for producing the polishing pad. In addition, according to the present disclosure, it is possible to determine a polishing pad, which shows an optimal removal rate selectivity along with excellent performance in a CMP process, through the physical property values of the polishing pad without a direct polishing test.

Abstract: Embodiments relate to a polishing pad for use in a chemical mechanical planarization (CMP) process of semiconductors, a process for preparing the same, and a process for preparing a semiconductor device using the same. In the polishing pad according to the embodiment, the size (or diameter) and distribution of a plurality of pores are adjusted, whereby the polishing performance such as polishing rate and within-wafer non-uniformity can be further enhanced.

Abstract: Disclosed is a method for producing a polishing pad, the method comprising the steps of: providing a polishing layer; forming a first through-hole penetrating the polishing layer; providing a support layer facing the polishing layer; interposing an adhesive layer between the polishing layer, which has the first through-hole, and support layer, and adhering the polishing layer and support layer to each other by means of the adhesive layer; forming, with the first through-hole as a reference point, a third through-hole penetrating the adhesive layer on a set area thereof, and a second through-hole penetrating the support layer on a set area thereof; and inserting a window inside the first through-hole.

Abstract: The embodiments relate to a polishing pad for use in a chemical mechanical planarization (CMP) process of semiconductors, to a process for preparing the same, and to a process for preparing a semiconductor device using the same. The polishing pad according to the embodiment adjusts the surface roughness characteristics of the polishing pad after polishing, whereby the polishing rate can be enhanced, and the surface residues, surface scratches, and chatter marks of the wafer can be remarkably reduced.

Abstract: A method for determining the status of a robot according to an embodiment includes acquiring first data and second data related to an operation of the robot, acquiring a resonance frequency by analyzing the operation of the robot in a frequency region based on the first data related to the operation of the robot, acquiring a first comparison result by comparing the acquired resonance frequency with a reference resonance frequency, when the first comparison result is a threshold value or more, generating a Lissajous figure by DQ transforming a three-phase signal based on the second data related to the operation of the robot, acquiring a second comparison result by comparing the generated Lissajous figure with a reference Lissajous figure, and determining the status of the robot based on at least one of the first comparison result and the second comparison result.

Abstract: Embodiments relate to a porous polyurethane polishing pad for use in a chemical mechanical planarization and a process for preparing the same. It is possible to control the size and distribution of pores in the porous polyurethane polishing pad by using thermally expanded microcapsules and an inert gas as a gas phase foaming agent, whereby the polishing performance thereof can be adjusted.