Abstract: A multi-stage phase mixer circuit includes: a first phase mixer configured to receive first and second input clock signals and output a first intermediate clock signal according to control of a first coarse control signal; a second phase mixer configured to receive the first and second input clock signals and output a second intermediate clock signal according to control of a second coarse control signal; and a third phase mixer configured to receive the first and second intermediate clock signals and output an output clock signal according to control of a fine control signal.
Type:
Application
Filed:
April 5, 2013
Publication date:
January 2, 2014
Applicants:
POSTECH ACADEMY-INDUSTRY FOUNDATION, SK hynidx Inc.