Abstract: A gateway includes memory configured to store computer-readable program code; and processing circuitry configured to access the memory and execute the computer-readable program code. The gateway is connected or connectable to a low-power wide area (LPWA) network. The gateway is caused to transmit a common timing reference at a constant interval that delineates an epoch including timeslots assignable to network nodes and a free-for-all interval. The gateway is also caused to join a network node to the LPWA network based on the common timing reference and is further caused to receive a join message including a measure of received signal strength or quality of the common timing reference at the network node. The gateway is also caused to assign one or more timeslots within the epoch, a frequency, a channel, or a modulation to the network node based on the measure of received signal strength or other quality.