Abstract: A CMOS image sensor with an imaging array of pixels containing selected pixels wherein illumination from a normal image is received by one set of pixels and illumination from an LED light source is received by another. The readout method serially separates the normal image signal from the LED light sourced signal. The signal from the selected pixels is resilient against saturation and thereby contributes to increased HDR. The image sensor array and readout method may be incorporated within a digital camera.

Abstract: A CMOS image sensor with an imaging array of pixels containing selected pixels wherein illumination is blocked and light scattered from an adjacent pixel is collected. The signal from the selected pixels is resilient against saturation and thereby contributes to increased dynamic range of the imaging signal. The image sensor may be incorporated within a digital camera.

Abstract: An image sensor has an image sensor array and circuit design employing a method of black level compensation to address image shading related to global exposure image capture and rolling row by row readout schemes. An image sensor including the invented black level compensation pixel array and method may be incorporated within a digital camera.

Abstract: An imaging system has a imaging array on a semiconductor chip which also includes circuit the elements NPU and SRAM to rapidly identify target objects in the imaging data and output their high level representations with low power consumption.

Abstract: Disclosed are a pixel unit, and an imaging method and apparatus thereof. The pixel has a first and a second pixel sub-portion each comprising one or more photodiodes; one or more transfer transistors each coupled to a floating diffusion, for transferring the charges generated by the one or more photodiodes in response to incident light during an exposure period and accumulated in the photodiode during said exposure period respectively to the floating diffusion; a reset transistor; and a source follower transistor coupled to the floating diffusion for amplifying and outputting the pixel signal of the floating diffusion. In some embodiments, the pixel further includes a capacitor and a gain control transistor.

Abstract: An image sensor pixel noise suppression circuit having a source follower transistor based pixel circuit, a power supply voltage and noise mirror circuit, a power supply voltage and noise gain circuit, and a comparator circuit. An output of the comparator circuit provides an image related output signal wherein the noise component of the source follower signal has been suppressed. The invention further includes a CMOS image sensor containing the image sensor pixel noise suppression circuit.

Abstract: An image sensor array and circuit design employs a method of black level compensation to address vertical image shading related to global exposure image capture and rolling row by row readout schemes. An image sensor having the invented black level compensation pixel array and method may be incorporated within a digital camera.

Abstract: Disclosed are a pixel unit, and an imaging method and apparatus thereof. The pixel comprises a first and a second pixel sub-portion each comprising one or more photodiodes; one or more transfer transistors each coupled to a floating diffusion, for transferring the charges generated by the one or more photodiodes in response to incident light during an exposure period and accumulated in the photodiode during said exposure period respectively to the floating diffusion; a reset transistor; and a source follower transistor coupled to the floating diffusion for amplifying and outputting the pixel signal of the floating diffusion. In some embodiments, the pixel further includes a capacitor and a gain control transistor.

Abstract: A pixel cell and row select and row driver circuits include two column bias circuits and row driver circuits, one placed at the right and one placed at the left side of the array of pixel cells. The digital control signals for the two sets of bias and row driver circuits enter at the center top or bottom of the array of pixel cells and drive the circuits symmetrically. The combination of two-sided row driver and column bias helps eliminate any signal delay and bias difference between the left and right side of the pixel cell array. More significantly this circuit construction can minimize horizontal shading in the resulting image.

Abstract: An image sensor array of shared pixel units fabricated by a CMOS technology, wherein each pixel unit includes a plurality of photodiodes and respective transfer transistors and floating drains whose layout constitutes mirror images. The plurality of photodiodes each share a single reset transistor and source follower amplifier transistor wherein the shared floating diode is spaced at the minimum distance from a gate electrode of the source follower transistor as is allowed by the CMOS fabrication technology chosen to manufacture the image sensor array.