Abstract: Disclosed are a pixel unit, an apparatus thereof, and a method thereof. The pixel unit comprises a first and a second transfer transistors with different photosensitive areas coupled to a floating diffusion and transfer the charges generated by a first and a second photodiodes in response to incident light during an exposure period and accumulated in the photodiode during said exposure period thereto; a capacitor with a first end coupled to a specified voltage; a gain control transistor coupled between the second end of the capacitor and the floating diffusion for imposing an isolation control therebetween; a reset transistor coupled to the second end of the capacitor and the gain control transistor for resetting the level of the coupling point therebetween via a reset control signal; and a source follower transistor coupled to the floating diffusion for amplifying and outputting the pixel signals.

Abstract: Disclosed are a pixel unit, and an imaging method and apparatus thereof. The pixel comprises a first and a second pixel sub-portion each comprising one or more photodiodes; one or more transfer transistors each coupled to a floating diffusion, for transferring the charges generated by the one or more photodiodes in response to incident light during an exposure period and accumulated in the photodiode during said exposure period respectively to the floating diffusion; a reset transistor; and a source follower transistor coupled to the floating diffusion for amplifying and outputting the pixel signal of the floating diffusion. In some embodiments, the pixel further includes a capacitor and a gain control transistor.

Abstract: The present disclosure relates to an imaging device, a pixel and a method thereof. The imaging device comprises: a pixel array, which comprises multiple pixels arranged in rows and columns, wherein at least one pixel comprises multiple subpixels, and the multiple subpixels share one floating diffusion region; and a control circuit, which controls the pixel array; wherein the control circuit reads the multiple subpixels one by one under the rolling shutter state, and reads the multiple subpixels simultaneously under the global shutter state.

Abstract: The present invention relates to an imaging apparatus, including a pixel array comprising a plurality of pixels arranged in rows and columns, wherein at least one of the pixels comprises: a first capacitor configured to store a reset signal, and a second capacitor configured to store a pixel signal; a plurality of column circuits, wherein at least one of the column circuits reads the reset signal from the first capacitor, reads the pixel signal from the second capacitor, and generates difference between the reset signal and the pixel signal, wherein the pixel is configured to store the pixel signal to the second capacitor after the reset signal is stored to the first capacitor.

Abstract: The present invention relates to an imaging apparatus, including a pixel array comprising a plurality of pixels arranged in rows and columns, wherein at least one of the pixels comprises a capacitor configured to store a reset signal and a pixel signal; and a plurality of column circuits, wherein at least one of the column circuits reads the reset signal and the pixel signal from the capacitor respectively, and generates the difference between the reset signal and the pixel signal, the generation of the pixel signal being later than that of the reset signal.

Abstract: A pixel cell has a photodiode, a transfer transistor, a reset transistor, an amplifier transistor in a common source configuration and a readout circuit block. The photodiode, transfer transistor, reset transistor and common source amplifier are disposed within a first substrate of a first semiconductor chip for accumulating an image charge in response to light incident upon the photodiode. The readout circuit block may be partially disposed within a second substrate of a second semiconductor chip and partially disposed within the first substrate wherein the readout circuit block comprises optionally selectable rolling shutter and global shutter readout modes through the use of computer programmable digital register settings. The global shutter readout mode provides in-pixel correlated double sampling.

Abstract: The present invention relates to an imaging apparatus, including a pixel array comprising a plurality of pixels arranged in rows and columns, wherein at least one of the pixels comprises: a first capacitor configured to store a reset signal, and a second capacitor configured to store a pixel signal; a plurality of column circuits, wherein at least one of the column circuits reads the reset signal from the first capacitor, reads the pixel signal from the second capacitor, and generates difference between the reset signal and the pixel signal, wherein the pixel is configured to store the pixel signal to the second capacitor after the reset signal is stored to the first capacitor.

Abstract: The present invention relates to an imaging apparatus, including a pixel array comprising a plurality of pixels arranged in rows and columns, wherein at least one of the pixels comprises a capacitor configured to store a reset signal and a pixel signal; and a plurality of column circuits, wherein at least one of the column circuits reads the reset signal and the pixel signal from the capacitor respectively, and generates the difference between the reset signal and the pixel signal, the generation of the pixel signal being later than that of the reset signal.

Abstract: The present invention relates to an imaging apparatus, which comprises: a pixel array, comprising a plurality of pixels arranged in rows and columns, wherein at least one of the pixels comprises: a first capacitor configured to store a reset signal, and a second capacitor configured to store a pixel signal; a plurality of column circuits, wherein at least one of the column circuits reads the reset signal from the first capacitor, reads the pixel signal from the second capacitor, and generates difference between the reset signal and the pixel signal, wherein the pixel is configured to store the pixel signal to the second capacitor after the reset signal is stored to the first capacitor.