Patents Assigned to Smoltek AB
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Patent number: 11348890Abstract: An assembly platform for arrangement as an interposer device between an integrated circuit and a substrate to interconnect the integrated circuit and the substrate through the assembly platform, the assembly platform comprising: an assembly substrate; a plurality of conducting vias extending through the assembly substrate; at least one nanostructure connection bump on a first side of the assembly substrate, the nanostructure connection bump being conductively connected to the vias and defining connection locations for connection with at least one of the integrated circuit and the substrate, wherein each of the nanostructure connection bumps comprises: a plurality of elongated conductive nanostructures vertically grown on the first side of the assembly substrate, wherein the plurality of elongated nanostructures are embedded in a metal for the connection with at least one of the integrated circuit and the substrate, at least one connection bump on a second side of the assembly substrate, the second side beingType: GrantFiled: October 22, 2020Date of Patent: May 31, 2022Assignee: SMOLTEK ABInventors: M Shafiqul Kabir, Anders Johansson, Vincent Desmaris, Muhammad Amin Saleem
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Patent number: 10991652Abstract: An interposer device comprising a first conductor pattern on a first side defining a portion of the interposer device to be covered by a first electrical circuit element; and a second conductor pattern on a second side to be connected to a second electrical circuit element. The second conductor pattern is electrically coupled to the first conductor pattern. The interposer device further comprises a plurality of nanostructure energy storage devices arranged within the portion of the interposer device to be covered by the first electrical circuit element. Each of the nanostructure energy storage devices comprises at least a first plurality of conductive nanostructures; a conduction controlling material embedding the nanostructures; a first electrode connected to each nanostructure in the first plurality of nanostructures; and a second electrode separated from each nanostructure in the first plurality of nanostructures by the conduction controlling material.Type: GrantFiled: September 3, 2020Date of Patent: April 27, 2021Assignee: SMOLTEK ABInventors: M Shafiqul Kabir, Anders Johansson, Muhammad Amin Saleem, Rickard Andersson, Vincent Desmaris
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Patent number: 10840203Abstract: An assembly platform for arrangement as an interposer device between an integrated circuit and a substrate to interconnect the integrated circuit and the substrate through the assembly platform, the assembly platform comprising: an assembly substrate; a plurality of conducting vias extending through the assembly substrate; at least one nanostructure connection bump on a first side of the assembly substrate, the nanostructure connection bump being conductively connected to the vias and defining connection locations for connection with at least one of the integrated circuit and the substrate, wherein each of the nanostructure connection bumps comprises: a plurality of elongated conductive nanostructures vertically grown on the first side of the assembly substrate, wherein the plurality of elongated nanostructures are embedded in a metal for the connection with at least one of the integrated circuit and the substrate, at least one connection bump on a second side of the assembly substrate, the second side beingType: GrantFiled: May 3, 2017Date of Patent: November 17, 2020Assignee: SMOLTEK ABInventors: M Shafiqul Kabir, Anders Johansson, Vincent Desmaris, Muhammad Amin Saleem
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Patent number: 10770390Abstract: An interposer device comprising a first conductor pattern on a first side defining a portion of the interposer device to be covered by a first electrical circuit element; and a second conductor pattern on a second side to be connected to a second electrical circuit element. The second conductor pattern is electrically coupled to the first conductor pattern. The interposer device further comprises a plurality of nanostructure energy storage devices arranged within the portion of the interposer device to be covered by the first electrical circuit element. Each of the nanostructure energy storage devices comprises at least a first plurality of conductive nanostructures; a conduction controlling material embedding the nanostructures; a first electrode connected to each nanostructure in the first plurality of nanostructures; and a second electrode separated from each nanostructure in the first plurality of nanostructures by the conduction controlling material.Type: GrantFiled: August 23, 2018Date of Patent: September 8, 2020Assignee: SMOLTEK ABInventors: M Shafiqul Kabir, Anders Johansson, Muhammad Amin Saleem, Rickard Andersson, Vincent Desmaris
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Patent number: 10741485Abstract: A nanostructure energy storage device comprising: at least a first plurality of conductive nanostructures provided on an electrically insulating surface portion of a substrate; a conduction controlling material embedding each nanostructure in said first plurality of conductive nanostructures; a first electrode connected to each nanostructure in said first plurality of nanostructures; and a second electrode separated from each nanostructure in said first plurality of nanostructures by said conduction controlling material, wherein said first electrode and said second electrode are configured to allow electrical connection of said nanostructure energy storage device to an integrated circuit.Type: GrantFiled: August 26, 2019Date of Patent: August 11, 2020Assignee: SMOLTEK ABInventors: M Shafiqul Kabir, Anders Johansson, Muhammad Amin Saleem, Peter Enoksson, Vincent Desmaris, Rickard Andersson
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Patent number: 10438880Abstract: An interposer device comprising an interposer substrate; a plurality of conducting vias extending through the interposer substrate; a conductor pattern on the interposer substrate, and a nanostructure energy storage device. The nanostructure energy storage device comprises at least a first plurality of conductive nanostructures formed on the interposer substrate; a conduction controlling material embedding each nanostructure in the first plurality of conductive nanostructures; a first electrode connected to each nanostructure in the first plurality of nanostructures; and a second electrode separated from each nanostructure in the first plurality of nanostructures by the conduction controlling material, wherein the first electrode and the second electrode are configured to allow electrical connection of the nanostructure energy storage device to the integrated circuit.Type: GrantFiled: February 24, 2017Date of Patent: October 8, 2019Assignee: SMOLTEK ABInventors: M Shafiqul Kabir, Anders Johansson, Muhammad Amin Saleem, Peter Enoksson, Vincent Desmaris, Rickard Andersson
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Patent number: 9206532Abstract: A method for manufacturing a plurality of nanostructures (101) on a substrate (102). The method comprises the steps of: depositing a bottom layer (103) on an upper surface of the substrate (102), the bottom layer (103) comprising grains having a first average grain size; depositing a catalyst layer (104) on an upper surface of the bottom layer (103), the catalyst layer (104) comprising grains having a second average grain size different from the first average grain size, thereby forming a stack of layers comprising the bottom layer (103) and the catalyst layer (104); heating the stack of layers to a temperature where nanostructures (101) can form; and providing a gas comprising a reactant such that the reactant comes into contact with the catalyst layer (104).Type: GrantFiled: October 18, 2010Date of Patent: December 8, 2015Assignee: Smoltek ABInventor: Mohammad Shafiqul Kabir
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Patent number: 9114993Abstract: A method for making one or more nanostructures is disclosed, the method comprising: depositing a conducting layer on an upper surface of a substrate; depositing a patterned layer of catalyst on the conducting layer; growing the one or more nanostructures on the layer of catalyst; and selectively removing the conducting layer between and around the one or more nanostructures. A device is also disclosed, comprising a substrate, wherein the substrate comprises one or more exposed metal islands separated by one or more insulating areas; a conducting helplayer disposed on the substrate covering at least some of the one or more exposed metal islands or insulating areas; a catalyst layer disposed on the conducting helplayer; and one or more nanostructures disposed on the catalyst layer.Type: GrantFiled: September 18, 2014Date of Patent: August 25, 2015Assignee: Smoltek ABInventors: Jonas T. Berg, Vincent Desmaris, Mohammad Shafiqul Kabir, Muhammad Amin Saleem, David Brud
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Patent number: 9028242Abstract: Template and method of making high aspect ratio template, stamp, and imprinting at nanoscale using nanostructures for the purpose of lithography, and to the use of the template to create perforations on materials and products.Type: GrantFiled: July 23, 2009Date of Patent: May 12, 2015Assignee: Smoltek ABInventors: Amin Saleem Muhammad, David Brud, Jonas Berg, Mohammad Shafiqul Kabir, Vincent Desmaris
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Patent number: 8815332Abstract: An apparatus, comprising two conductive surfaces or layers and a nanostructure assembly bonded to the two conductive surfaces or layers to create electrical or thermal connections between the two conductive surfaces or layers, and a method of making same.Type: GrantFiled: August 9, 2012Date of Patent: August 26, 2014Assignee: Smoltek ABInventors: Mohammad Shafiqul Kabir, Andrzej Brud
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Publication number: 20130334704Abstract: A method for making one or more nanostructures is disclosed, the method comprising: depositing a conducting layer on an upper surface of a substrate; depositing a patterned layer of catalyst on the conducting layer; growing the one or more nanostructures on the layer of catalyst; and selectively removing the conducting layer between and around the one or more nanostructures. A device is also disclosed, comprising a substrate, wherein the substrate comprises one or more exposed metal islands separated by one or more insulating areas; a conducting helplayer disposed on the substrate covering at least some of the one or more exposed metal islands or insulating areas; a catalyst layer disposed on the conducting helplayer; and one or more nanostructures disposed on the catalyst layer.Type: ApplicationFiled: August 7, 2013Publication date: December 19, 2013Applicant: Smoltek ABInventors: Jonas S. T. Berg, Vincent Desmaris, Mohammad Shafiqul Kabir, Muhammad Amin Saleem, David Brud
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Publication number: 20130230736Abstract: A method for manufacturing a plurality of nanostructures (101) on a substrate (102). The method comprises the steps of: depositing a bottom layer (103) on an upper surface of the substrate (102), the bottom layer (103) comprising grains having a first average grain size; depositing a catalyst layer (104) on an upper surface of the bottom layer (103), the catalyst layer (104) comprising grains having a second average grain size different from the first average grain size, thereby forming a stack of layers comprising the bottom layer (103) and the catalyst layer (104); heating the stack of layers to a temperature where nanostructures (101) can form; and providing a gas comprising a reactant such that the reactant comes into contact with the catalyst layer (104).Type: ApplicationFiled: October 18, 2010Publication date: September 5, 2013Applicant: SMOLTEK ABInventor: Mohammad Shafiqul Kabir
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Patent number: 8508049Abstract: A method for making one or more nanostructures is disclosed, the method comprising: depositing a conducting layer on an upper surface of a substrate; depositing a patterned layer of catalyst on the conducting layer; growing the one or more nanostructures on the layer of catalyst; and selectively removing the conducting layer between and around the one or more nanostructures. A device is also disclosed, comprising a substrate, wherein the substrate comprises one or more exposed metal islands separated by one or more insulating areas; a conducting helplayer disposed on the substrate covering at least some of the one or more exposed metal islands or insulating areas; a catalyst layer disposed on the conducting helplayer; and one or more nanostructures disposed on the catalyst layer.Type: GrantFiled: February 24, 2009Date of Patent: August 13, 2013Assignee: Smoltek ABInventors: Jonas S. T. Berg, Vincent Desmaris, Mohammad Shafiqul Kabir, Muhammad Amin Saleem, David Brud
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Patent number: 8415787Abstract: The present invention relates to a heat dissipator that includes a conductive substrate and a plurality of nanostructures supported by the conductive substrate. The nanostructures are at least partly embedded in an insulator. Each of the nanostructures includes a plurality of intermediate layers on the conductive substrate. At least two of the plurality of intermediate layers are interdiffused, and material of the at least two of the plurality of intermediate layers that are interdiffused is present in the nanostructure.Type: GrantFiled: May 21, 2012Date of Patent: April 9, 2013Assignee: Smoltek ABInventor: Mohammad Shafiqul Kabir
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Publication number: 20120301607Abstract: An apparatus, comprising two conductive surfaces or layers and a nanostructure assembly bonded to the two conductive surfaces or layers to create electrical or thermal connections between the two conductive surfaces or layers, and a method of making same.Type: ApplicationFiled: August 9, 2012Publication date: November 29, 2012Applicant: SMOLTEK ABInventors: Mohammad Shafiqul Kabir, Andrzej Brud
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Publication number: 20120224327Abstract: The present invention provides for nanostructures grown on a conducting or insulating substrate, and a method of making the same. The nanostructures grown according to the claimed method are suitable for interconnects and/or as heat dissipators in electronic devices.Type: ApplicationFiled: May 21, 2012Publication date: September 6, 2012Applicant: SMOLTEK ABInventor: Mohammad Shafiqul Kabir
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Patent number: 8253253Abstract: An apparatus, comprising two conductive surfaces or layers and a nanostructure assembly bonded to the two conductive surfaces or layers to create electrical or thermal connections between the two conductive surfaces or layers, and a method of making same.Type: GrantFiled: January 30, 2012Date of Patent: August 28, 2012Assignee: Smoltek ABInventors: Andrzej Brud, Mohammad Shafiqul Kabir
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Publication number: 20120125537Abstract: An apparatus, comprising two conductive surfaces or layers and a nanostructure assembly bonded to the two conductive surfaces or layers to create electrical or thermal connections between the two conductive surfaces or layers, and a method of making same.Type: ApplicationFiled: January 30, 2012Publication date: May 24, 2012Applicant: SMOLTEK ABInventors: Mohammad Shafiqul Kabir, Andrzej Brud
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Publication number: 20110195141Abstract: Template and method of making high aspect ratio template, stamp, and imprinting at nanoscale using nanostructures for the purpose of lithography, and to the use of the template to create perforations on materials and products.Type: ApplicationFiled: July 23, 2009Publication date: August 11, 2011Applicant: SMOLTEK ABInventors: Amin Saleem Muhammad, David Brud, Jonas Berg, Mohammad Shaflqul Kabir, Vincent Desmaris
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Controlled growth of a nanostructure on a substrate, and electron emission devices based on the same
Patent number: 7977761Abstract: The present invention provides for an array of nanostructures grown on a conducting substrate. The array of nanostructures as provided herein is suitable for manufacturing electronic devices such as an electron beam writer, and a field emission device.Type: GrantFiled: March 16, 2010Date of Patent: July 12, 2011Assignee: Smoltek ABInventor: Mohammad Shafiqul Kabir