Abstract: Methods and apparatus for modeling noise present in an integrated circuit substrate are disclosed. A position on a surface of the integrated circuit substrate is obtained. A combination of layers associated with the position and defining a vertical column beneath the position is ascertained. A doping profile associated with the combination of layers is obtained. The doping profile includes a plurality of portions, each of which is associated with a different range of substrate depth. Noise in the integrated circuit substrate is then modeled using the obtained doping profile.
Abstract: Methods and apparatus for modeling noise present in an integrated circuit substrate are disclosed. A position on a surface of the integrated circuit substrate is obtained. A combination of layers associated with the position and defining a vertical column beneath the position is ascertained. A doping profile associated with the combination of layers is obtained. The doping profile includes a plurality of portions, each of which is associated with a different range of substrate depth. Noise in the integrated circuit substrate is then modeled using the obtained doping profile.